CY7C138, CY7C139
Document #: 38-06037 Rev. *D Page 5 of 17
Figure 2. AC Test Loads and Waveforms
3.0V
GND
90% 90%
10%
<3ns <3 ns
10%
ALL INPUT PULSES
(a) Normal Load (Load 1)
R1 = 893Ω
5V
OUTPUT
R2 = 347Ω
C=30pF
RTH= 250Ω
VTH= 1.4V
OUTPUT
C = 30pF
(b) Thé veninEquivalent(Load1) (c) Three-State Delay (Load 3)
C=30pF
OUTPUT
Load (Load 2)
R1 = 893Ω
R2 = 347Ω
5V
OUTPUT
C=5pF
Note
8. Tested initially and after any design or process changes that may affect these parameters.
Switching Characteristics Over the Operating Range[9]
Parameter Description
7C138-15
7C139-15
7C138-25
7C139-25
7C138-35
7C139-35
7C138-55
7C139-55 Unit
Min Max Min Max Min Max Min Max
READ CYCLE
tRC Read Cycle Time 15 25 35 55 ns
tAA Address to Data Valid 15 25 35 55 ns
tOHA Output Hold From Address Change 3 3 3 3 ns
tACE CE LOW to Data Valid 15 25 35 55 ns
tDOE OE LOW to Data Valid 10 15 20 25 ns
tLZOE[10,11,12] OE Low to Low Z 3 3 3 3 ns
tHZOE[10,11,12] OE HIGH to High Z 10 15 20 25 ns
tLZCE[10,11,12] CE LOW to Low Z 3 3 3 3 ns
tHZCE[10,11,12] CE HIGH to High Z 10 15 20 25 ns
tPU[12] CE LOW to Power-Up 0 0 0 0 ns
tPD[12] CE HIGH to Power-Down 15 25 35 55 ns
WRITE CYCLE
tWC Write Cycle Time 15 25 35 55 ns
tSCE CE LOW to Write End 12 20 30 40 ns
tAW Address Set-Up to Write End 12 20 30 40 ns
tHA Address Hold From Write End 2 2 2 2 ns
tSA Address Set-Up to Write Start 0 0 0 0 ns
tPWE Write Pulse Width 12 20 25 30 ns
tSD Data Set-Up to Write End 10 15 15 20 ns
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