Cypress STK12C68-5 Package Diagrams

STK12C68-5 (SMD5962-94599)

Document Number: 001-51026 Rev. ** Page 17 of 18

Figure 16. 28-Pad (350-Mil) LCC (001-51696)

Package Diagrams (continued)

1.ALL D IMENSION A RE IN INCHES AND MILLIMETER S [MIN/MAX]

2.JEDEC 95 OUTLINE# M O-041

3.PACKAGE WEIGHT : TBD

001-51696 **

[+] Feedback

Contents

Main STK12C68-5 (SMD5962-94599) 64 Kbit (8K x 8) AutoStore nvSRAM Features Functional Description Logic Block Diagram STK12C68-5 (SMD5962-94599) Pinouts Pin Definitions Device Operation SRAM Read SRAM Write AutoStore Operation STK12C68-5 (SMD5962-94599) AutoStore Inhibit Mode Hardware STORE (HSB) Operation Hardware RECALL (Power Up) Software STORE STK12C68-5 (SMD5962-94599) Data Protection Noise Considerations Hardware Protect Low Average Active Power STK12C68-5 (SMD5962-94599) Best Practices Maximum Ratings Operating Range DC Electrical Characteristics STK12C68-5 (SMD5962-94599) Data Retention and Endurance Capacitance Thermal Resistance AC Test Conditions STK12C68-5 (SMD5962-94599) AC Switching Characteristics SRAM Read Cycle Switching Waveforms Document Number: 001-51026 Rev. ** Page 10 of 18 Switching Waveforms Figure 11. SRAM Write Cycle 2: CE Controlled [11, 12] t t t t t t t SD t t HZWE t AutoStore or Power Up RECALL Switching Waveform STK12C68-5 (SMD5962-94599) Software Controlled STORE/RECALL Cycle Switching Waveform / t Hardware STORE Cycle Switching Waveform Part Numbering Nomenclature STK12C68 - 5 C 35 M SMD5962 - 94599 01 MX X Ordering Information Page Package Diagrams Document History Page Sales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC Solutions