Dell
|
| How is this memory write |
|
|
|
|
|
|
|
| |
|
|
|
|
| |
|
| protected? |
|
| How is the memory cleared? |
|
|
|
|
|
|
FRU |
| Protected. No iDRAC |
|
| |
|
| embedded firmware writes |
|
| |
|
| to this device. |
|
| |
|
| Theoretically, IPMI I2C |
|
| |
|
| Master write commands |
|
| |
|
| would flow through to |
|
| |
|
| overwrite this EEPROM. |
| N/A - not in system clearable | |
|
|
|
|
| |
IBUTTON Key |
| SHA1 encryption included. |
|
| |
EEPROM |
| Storage Controller use |
|
| |
|
| only. |
| N/A - not in system clearable | |
|
|
|
|
| |
CPLD |
| Factory programmable |
|
| |
|
| only |
| N/A - not in system clearable | |
|
|
|
|
|
|
SAS 6/iR Integrated |
|
|
|
|
|
|
|
|
|
| |
Controller |
| Write control access by |
|
| |
Configuration Data |
| Storage Controller |
|
| |
|
| firmware |
| N/A - not in system clearable | |
|
|
|
|
| |
FRU |
| Protected in that no iDRAC |
|
| |
|
| embedded firmware writes |
|
| |
|
| to this device. Although |
|
| |
|
| very convoluted, |
|
| |
|
| theoretically, IPMI I2C |
|
| |
|
| Master write commands |
|
| |
|
| would flow through to |
|
| |
|
| overwrite this EEPROM |
| N/A - not in system clearable | |
|
|
|
|
|
|
Integrated Mirroring |
| Storage controller |
|
| |
NVSRAM |
|
|
| ||
|
| firmware accessed only |
| N/A - not in system clearable | |
|
|
|
|
|
|
iDRAC6 Enterprise |
|
|
|
|
|
|
|
|
|
|
|
vFlash |
| Media write protection |
| iDRAC based format or local OS format or delete or card removal | |
|
|
| |||
|
| switch or OS control |
| and formatted on a client | |
|
|
|
|
|
|
82
PowerEdge R510 Technical Guide
