ZEUS Technical Manual

Detailed hardware description

 

 

PXA270 GPIO pin assignments

The table below summarizes the use of the 118 PXA270 GPIO pins, their direction, alternate function and active level.

Key:

AF

 

Alternate function.

 

 

 

Dir

 

Pin direction.

 

 

 

 

 

 

 

ActiveFunction active level or edge.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

For details of pin states during sleep modes and reset see the Pin Usage table

 

 

 

 

in the Intel PXA27x Processor Family Electrical, Mechanical and Thermal

 

 

 

 

Specification.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GPIO

 

 

 

 

 

 

 

Wake-up

 

 

 

 

No

AF Signal name

Dir

Active FunctionsourceSee section…

0

0

AC97_IRQ

Input

 

 

 

 

AC97Interrupt

3

Audio, page 49

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

0

DS_WAKEUP

Input

 

 

 

Reset in case of power

3

 

 

 

 

 

 

 

 

 

 

failure

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

0

PWR_SCL

Output

 

 

 

 

 

Power management IC,

 

 

 

 

 

 

 

 

 

 

PXA270 Power Manager I2C

 

4

0

PWR_SDA

Bidir.

 

 

 

 

 

page 64

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5

N/A PWR_CAP0

Power

 

 

 

 

 

 

 

6

N/A PWR_CAP1

Power

 

 

 

Dedicated function - To

 

 

 

 

 

 

 

 

 

 

 

 

 

achieve low power during

 

N/A

7

N/A PWR_CAP2

Power

 

 

 

sleep

 

 

 

 

 

 

 

 

 

 

8

N/A PWR_CAP3

Power

 

 

 

 

 

 

 

9

0

UART_INTA

Input

 

 

 

UART 1 Interrupt

 

 

10

0

UART_INTB

 

 

 

 

UART 2 Interrupt

Input

 

 

 

 

 

 

11

0

UART_INTD

Input

 

 

UART 4 Interrupt

 

12

0

UART_INTC

Input

 

 

 

UART 3 Interrupt

 

 

3

3

3

3

13

0 USER_LINK1 Input

User Configurable Input

3

JP1 – User jumpers,

page 93

 

 

 

 

continued…

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