ZEUS Technical Manual | Detailed hardware description |
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PC/104 interface
The ZEUS PC/104 interface is emulated from the PXA270 PC card interface to support 8/16 bit ISA bus style signals. As the interface is an emulation, the ZEUS does not support some PC/104 features. Please refer to the section Unsupported PC/104 interface features on page 43 for specific details.
The ISA bus is based on the x86 architecture and is not normally associated with RISC processors. It is generally necessary to modify standard drivers to support any third party PC/104 modules.
Any PC/104
Address |
| Region size | Region name |
0x30000000 | – 0x300003FF | 1KByte | PC/104 I/O space, |
0x30000400 | – 0x3BFFFFFF | - | Reserved. |
0x3C000000 – 0x3C1FFFFF | 16MB | PC/104 memory space, | |
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ZEUS PC/104 interface details
The PC/104 bus signals are compatible with the ISA bus electrical timing definitions.
All signals between the PXA270 and the PC/104 are buffered. When the PC/104 bus is not in use, all output signals with the exception of the clock signals are set to their inactive state.
The ZEUS provides +5V to a PC/104
The reset signal applied to the PC/104 bus is combination of the RESET_OUT# pin of PXA270 and an additional circuit that monitors +5V supply.
Due to the specific power management requirements of the PXA270, there is no reset generated to PXA270 if the +5V supply is below its limits. If the reset is generated to the PC/104 bus by the +5V monitoring IC, an interrupt can be asserted to PXA270 on GPIO20.
© 2007 Eurotech Ltd Issue D | 41 |