ZEUS Technical Manual | Detailed hardware description |
| |
Flat panel display
The PXA270 processor contains an integrated LCD display controller. It is capable of supporting both colour and monochrome single- and dual-scan display modules. It supports active (TFT) and passive (STN) LCD displays up to 800x600 pixels.
The PXA270 can drive displays with a resolution up to 800x600, but as the PXA270 has a unified memory structure, the bandwidth to the application decreases significantly. If the application makes significant use of memory, such as when video is on screen, you may also experience FIFO under-runs causing the frame rates to drop or display image disruption. Reducing the frame rate to the slowest speed possible gives the maximum bandwidth to the application. The display quality for an 800x600 resolution LCD is dependant on the compromises that can be made between the LCD refresh rate and the application. The PXA270 is optimized for a 640x480 display resolution.
A full explanation of the graphics controller operation can be found in the Intel PXA27x Processor Family Developer’s Manual included on the Development Kit CD.
The ZEUS-FPIF interface board allows the user to easily wire-up a panel using pin and crimp style connectors (see page 122). Contact Eurotech Sales (see page 97) for purchasing information. Alternatively, the display interface is connected to an LVDS interface (see the section LVDS interface, page 47). This may be useful when driving displays located more than 300mm (12") from the ZEUS.
The following tables provide a cross-reference between the flat panel data signals and their function when configured for different displays.
TFT panel data bit mapping to the ZEUS
The PXA270 can directly interface to 18-bit displays, but from a performance point of view it is better to use 16-bit only. 18-bit operation requires twice the bandwidth of 16-bit operation.
The following table shows TFT panel data bit mapping to the ZEUS:
| Panel data bus bit | 18-bit TFT | 12-bit TFT | 9-bit TFT |
FPD 15 | R5 | R3 | R2 |
FPD 14 | R4 | R2 | R1 |
FPD 13 | R3 | R1 | R0 |
FPD 12 | R2 | R0 | - |
FPD 11 | R1 | - | - |
GND | R0 | - | - |
FPD 10 | G5 | G3 | G2 |
FPD 9 | G4 | G2 | G1 |
FPD 8 | G3 | G1 | G0 |
continued…
© 2007 Eurotech Ltd Issue D | 44 |
