Fairchild AN-7502 manual Appendix B - Estimating RO for Some Typical Gate-Drive Circuits, Turn-Off

Models: AN-7502

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Turn-On

Application Note 7502

Turn-On

State 1: MOS Off, JFET Off

State 5: Mos Active, JFET Saturated

The JFET current generator VxgmJ, is operative.

IPK1 = VG/RO

State 2: MOS Active, JFET Active

IPK2 = (VG - VGS(TH))/RO

t =

[VDK - VD[SAT])CX

IPK5

State 3: MOS Active, JFET Saturated

IPK3 = (VG - VG(SAT))/RO

Turn-Off

IPK5 = VG(SAT)/RO

State 6: Mos Active, JFET Active

The Miller effect is now reduced by the activation of VGgMJ, and the equivalent circuit predicts:

State 4: MOS Saturated, JFET Saturated

IPK4 = VG/RO

t =

[VDD - VDK][CGS + CX(1 + gM/gMJ)]

gMRL IPAK6

State 5: MOS Active, JFET Saturated

IPK5 = VG(SAT)/RO

State 6: MOS Active, JFET Active

IPK6 = VG(SAT)/RO

The equivalent circuit of Figure A-1 predicts that: dVD/dt = (-gMRL(VG- VGS(TH))e-t/T1) /T1

where T1 = ROCGS + (1 + gM/gMJ)ROCX

IPAK6 = VG(SAT)/RO

Appendix B - Estimating RO for Some Typical Gate-Drive Circuits

Case 1: Typical Pulse-Generator Drive, Figure B-1

VDD

Note that gMRL(VG - VGS(TH)) is usually an order of magnitude greater than VDD, indicating that the drain voltage is discharg-

VGEN

RL

ing toward a very large negative value. The device operation, then, is on the early, almost linear, portion of the exponential, where e-t/T1approximates unity. The drain current of Figure A- 2, and hence the drain voltage, does indeed exhibit a linear decrease with time.

Thus, for state 2:

RGEN

VG

RGS

FIGURE B-1. TYPICAL PULSE-GENERATOR DRIVE CIRCUIT

t =

[VDD - VDK][CGS + CX(1 + gM/gMJ)]

gMRL IPK2

Turn-On and Turn-Off

RO = RGENRGS/(RGEN + RGS)

where IPK2 = (VG - VGS(TH))/RO

State 3: Mos Active, JFET Saturated

Because of the Miller effect, the gate voltage and, hence, the gate current, is almost constant during the tail time. The equivalent circuit then predicts:

dVD

=

gMRLlG

=

lG

dt

CGS + (1 + gMRL)CX

CX

 

 

lG = IPK3 = (VG - VG(SAT))/RO

 

 

and

t =

(VDK - VD[SAT])Cx

 

 

 

 

 

IPK3

State 4: Mos Saturated, JFET Saturated (Turn-off)

Both equivalent-circuit generators are short circuits, and the gate drive is discharging CX in parallel with CGS through RO.

t= RO(CGS + CX) ln[VG/VG(SAT)] IPK4 = VG/RO

For the typical case where RGEN = 50, and a coaxial-cable termination of 50 ohms, RO = 25and VG = VGEN/2.

Case 2: Voltage-Follower Gate Drive, Figure B-2

State 5: Mos Active, JFET Saturated +

RL

VDD

RS

FIGURE B-2. VOLTAGE-FOLLOWER GATE-DRIVE CIRCUIT

Turn-On

RO is approximately equal to 1/gM for RS very much greater than 1/gM.

gm = transconductance of driving MOSFET transistor.

Turn Off

RO = RS

©2002 Fairchild Semiconductor Corporation

Application Note 7502 Rev. A1

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Fairchild AN-7502 Appendix B - Estimating RO for Some Typical Gate-Drive Circuits, Application Note, Turn-Off, Turn-On