MB39A104
■PIN DESCRIPTION
Pin No. | Symbol | I/O | Descriptions | |
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1 | VCCO | | Output circuit power supply terminal (Connect to same potential as VCC pin.) | |
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2 | VH | O | Power supply terminal for FET drive circuit (VH = VCC − 5 V) | |
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3 | OUT1 | O | External Pch MOS FET gate drive terminal | |
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4 | VS1 | I | Overcurrent protection circuit input terminal | |
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| Overcurrent protection circuit detection resistor connection terminal. Set | |
5 | ILIM1 | I | overcurrent detection reference voltage depending on external resistor and | |
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| internal current resource (110 ∝A at RT = 24 kΩ) | |
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6 | DTC1 | I | PWM comparator block (PWM) input terminal. Compares the lowest voltage | |
among FB1 and DTC terminals with triangular wave and controls output. | ||||
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7 | VCC | | Power supply terminal for reference power supply and control circuit | |
(Connect to same potential as the VCCO terminal) | ||||
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8 | CSCP | | ||
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9 | FB1 | O | Error amplifier (Error Amp 1) output terminal | |
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10 | −INE1 | I | Error amplifier (Error Amp 1) inverted input terminal | |
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11 | CS1 | | ||
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12 | RT | | Triangular wave oscillation frequency setting resistor connection terminal | |
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13 | CT | | Triangular wave oscillation frequency setting capacitor connection terminal | |
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14 | CS2 | | ||
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15 | −INE2 | I | Error amplifier (Error Amp 2) inverted input terminal | |
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16 | FB2 | O | Error amplifier (Error Amp 2) output terminal | |
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17 | VREF | O | Reference voltage output terminal | |
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18 | GND | | Output circuit ground terminal (Connect to same potential as GNDO | |
terminal.) | ||||
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19 | DTC2 | I | PWM comparator block (PWM) input terminal. Compares the lowest voltage | |
among FB2 and DTC terminals with triangular wave and controls output. | ||||
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| Overcurrent protection circit detection resistor connection terminal. Set | |
20 | ILIM2 | I | overcurrent detection reference voltage depending on external resistor and | |
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| internal current resource (110 ∝A at RT = 24 kΩ) | |
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21 | VS2 | I | Overcurrent protection circuit input terminal | |
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22 | OUT2 | O | External Pch MOS FET gate drive terminal | |
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23 | GNDO | | Output circuit ground terminal (Connect to same potential as GND terminal.) | |
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24 | CTL | I | Power supply control terminal. Setting the CTL terminal at “L” level places IC | |
in the standby mode. | ||||
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