Fujitsu MHD2032AT, MHC2032AT, MHD2021AT, MHC2040AT Write circuit, Write precompensation algorithm

Models: MHC2040AT MHC2032AT MHD2032AT MHD2021AT

1 219
Download 219 pages 60.51 Kb
Page 59
Image 59

Theory of Device Operation

signal (WUS) when a write error occurs due to head short-circuit or head disconnection.

The Pre AMP sets the write current and bias current which flows through MR devices.

4.6.2 Write circuit

The write data is output from the hard disk controller (HDC) with the NRZ data format, and sent to the encoder circuit in the RDC. The NRZ write data is converted from 16-bit data to 17-bit data by the encoder circuit then sent to the PreAMP, and the data is written onto the media.

(1) 16/17 GCR

The disk drive converts data using the 16/17 (0, 12, 8) group coded recording (GCR) algorithm. This code follows a format in which 0 to 12 “0”s are inserted while the code bit is “1” and 0 to 8 “0”s are inserted while the 0DD/EVEN bit is “1”.

(2) Write precompensation

Write precompensation compensates, during a write process, for write non- leneartiry generated at reading. Table 4.2 shows the write precompensation algorithm.

Table 4.2 Write precompensation algorithm

Bits

Compensation

 

 

111001

–7

111010

–6

:

 

111111

–1

000000

±0

000001

+1

:

 

010000

+16

:

 

100000

+32

 

 

4-10

C141-E050-02EN

Page 59
Image 59
Fujitsu MHD2032AT, MHC2032AT, MHD2021AT, MHC2040AT manual Write circuit, Write precompensation algorithm