Specifications

Line Interface

Line Interface

Port Configurations

 

SPI

ASI

M2S

DHEI

 

 

 

 

 

 

 

 

 

Type

8–bit parallel

serial

serial

serial

Maximum line rate

108 Mb/s

 

216 Mb/s

 

216 Mb/s

 

40 Mb/s

Timestamps

Packet timestamp clock:

Packet timestamp clock:

Packet timestamp clock:

Packet timestamp clock:

 

10 MHz +/- 5 ppm

33 MHz +/- 5 ppm

33 MHz +/- 5 ppm

33 MHz +/- 5 ppm

 

Resolution of timestamp

Resolution of timestamp

Resolution of timestamp

Resolution of timestamp

 

clock: 100 ns

clock: 30 ns

clock: 30 ns

clock: 30 ns

Packet timestamp sampling is accurate to within +/- 1 timestamp clock period between consecutive packets

Packet timestamp sampling is accurate to within +/- 1 timestamp clock period between consecutive packets

Packet timestamp sampling is accurate to within +/- 1 timestamp clock period between consecutive packets

Packet timestamp sampling is accurate to within +/- 1 timestamp clock period between consecutive packets

Electrical Spec

EIA/TIA-644 (LVDS)

75 coax

50 coax

Balanced ECL

Connector Type

DB-25 (through adapter)

BNC

SMA/SMB

DB-25

 

 

 

 

(through adapter)

 

 

Standard

EN 50083–9

EN 50083–9

“Using the DiviCom M2S

SCTE DVS/110

 

“Interfaces for

“Interfaces for

Interface”—DiviCom

4 September 1997

 

CATV/SMATV Headends

CATV/SMATV Headends

Application Note 0002

Response to SCTE DVS

 

and similar Professional

and similar Professional

 

CFI (DVS/089R1):

 

Equipment”

Equipment”

 

Cable Headend and

 

 

 

 

 

Distribution Systems

Part Number

N/A

ASI and Serial ECL (DHEI) interface: E6291A

 

 

 

 

 

 

 

 

 

 

 

 

 

WA R N I N G

 

To ensure the Electromagnetic Compatibility (EMC) of MPEGscope, use shielded

 

 

cables on all interfaces.

 

 

 

 

 

 

 

 

 

 

A-6

Page 34
Image 34
HP MPEGscope manual Line Interface