Intel 253668-032US APPENDIX C MP INITIALIZATION FOR P6 FAMILY PROCESSORS, APPENDIX D PROGRAMMING THE LINT0 AND LINT1 INPUTS, APPENDIX E INTERPRETING MACHINE-CHECK ERROR CODES

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B.3 MSRS IN THE INTEL® ATOM™ PROCESSOR FAMILY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-58
B.4 MSRS IN THE INTEL® MICROARCHITECTURE (NEHALEM). . . . . . . . . . . . . . . . . . . . . . . . . . . . B-73
B.5 MSRS IN THE PENTIUM® 4 AND INTEL® XEON® PROCESSORS . . . . . . . . . . . . . . . . . . . . B-96
B.5.1 MSRs Unique to Intel Xeon Processor MP with L3 Cache . . . . . . . . . . . . . . . . . . . . . . . . B-136
B.6 MSRS IN INTEL® CORE™ SOLO AND INTEL® CORE™ DUO PROCESSORS . . . . . . . . . . B-139
B.7 MSRS IN THE PENTIUM M PROCESSOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-152
B.8 MSRS IN THE P6 FAMILY PROCESSORS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-162
B.9 MSRS IN PENTIUM PROCESSORS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-174
APPENDIX C
MP INITIALIZATION FOR P6 FAMILY PROCESSORS
C.1 OVERVIEW OF THE MP INITIALIZATION PROCESS FOR P6 FAMILY PROCESSORS. . . . . . . C-1
C.2 MP INITIALIZATION PROTOCOL ALGORITHM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-2
C.2.1 Error Detection and Handling During the MP Initialization Protocol . . . . . . . . . . . . . . . . . .C-4
APPENDIX D
PROGRAMMING THE LINT0 AND LINT1 INPUTS
D.1 CONSTANTS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-1
D.2 LINT[0:1] PINS PROGRAMMING PROCEDURE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-1
APPENDIX E
INTERPRETING MACHINE-CHECK
ERROR CODES
E.1 INCREMENTAL DECODING INFORMATION: PROCESSOR FAMILY 06H MACHINE ERROR
CODES FOR MACHINE CHECK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E-1
E.2 INCREMENTAL DECODING INFORMATION: INTEL CORE 2 PROCESSOR FAMILY MACHINE
ERROR CODES FOR MACHINE CHECK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E-5
E.2.1 Model-Specific Machine Check Error Codes for Intel Xeon Processor 7400 Series. . . .E-9
E.2.1.1 Processor Machine Check Status Register
Incremental MCA Error Code Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E-9
E.2.2 Intel Xeon Processor 7400 Model Specific Error Code Field . . . . . . . . . . . . . . . . . . . . . . . E-10
E.2.2.1 Processor Model Specific Error Code Field
Type B: Bus and Interconnect Error. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E-10
E.2.2.2 Processor Model Specific Error Code Field
Type C: Cache Bus Controller Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E-10
E.3 INCREMENTAL DECODING INFORMATION: PROCESSOR FAMILY WITH CPUID
DISPLAYFAMILY_DISPLAYMODEL SIGNATURE 06_1AH, MACHINE ERROR CODES FOR
MACHINE CHECK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E-11
E.3.1 QPI Machine Check Errors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E-12
E.3.2 Internal Machine Check Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E-13
E.3.3 Memory Controller Errors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E-14
E.4 INCREMENTAL DECODING INFORMATION: PROCESSOR FAMILY 0FH MACHINE ERROR CODES
FOR MACHINE CHECK. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E-15
E.4.1 Model-Specific Machine Check Error Codes for Intel Xeon Processor MP 7100 Series. .E-
16
E.4.1.1 Processor Machine Check Status Register
MCA Error Code Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E-18
E.4.2 Other_Info Field (all MCA Error Types). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E-19