Intel 253668-032US - page 356

8-50 Vol. 3
MULTIPLE-PROCESSOR MANAGEMENT
8.9.2 Hierarchical Mapping of CPUID Extended Topology Leaf
CPUID leaf 0BH provides enumeration parameters for software to identify each hier-
archy of the processor topology in a deterministic manner. Each hierarchical level of
the topology starting from the SMT level is represented numerically by a sub-leaf
index within the CPUID 0BH leaf. Each level of the topology is mapped to a sub-field
in the APIC ID, following the general relationship depicted in Figure 8-6. This mech-
anism allows software to query the exact number of levels within a physical
processor package and the bit-width of each sub-field of x2APIC ID directly. For
example,
•Starting from sub-leaf index 0 and incrementing ECX until CPUID.(EAX=0BH,
ECX=N):ECX[15:8] returns an invalid “level type“ encoding. The number of
levels within the physical processor package is “N“ (excluding PACKAGE). Using
Figure 8-6 as an example, CPUID.(EAX=0BH, ECX=3):ECX[15:8] will report
00H, indicating sub leaf 03H is invalid. This is also depicted by a pseudo code
example:
Example 8-16. Number of Levels Below the Physical Processor Package
Byte type = 1;
s = 0;
While ( type ) {
EAX = 0BH; // query each sub leaf of CPUID leaf 0BH
ECX = s;
CPUID;
type = ECX[15:8]; // examine level type encoding
s ++;
}
N = ECX[7:0];
•Sub-leaf index 0 (ECX= 0 as input) provides enumeration parameters to extract
the SMT sub-field of x2APIC ID. If EAX = 0BH, and ECX =0 is specified as input
when executing CPUID, CPUID.(EAX=0BH, ECX=0):EAX[4:0] reports a value (a
right-shift count) that allow software to extract part of x2APIC ID to distinguish
the next higher topological entities above the SMT level. This value also
corresponds to the bit-width of the sub-field of x2APIC ID corresponding the
hierarchical level with sub-leaf index 0.
•For each subsequent higher sub-leaf index m, CPUID.(EAX=0BH,
ECX=m):EAX[4:0] reports the right-shift count that will allow software to extract
part of x2APIC ID to distinguish higher-level topological entities. This means the
right-shift value at of sub-leaf m, corresponds to the least significant (m+1)
subfields of the 32-bit x2APIC ID.
Example 8-17. BitWidth Determination of x2APIC ID Subfields