User’s Manual

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BIOS shadow at 16KB increment

Decoupled and burst DRAM refresh with staggered RAS timing

CAS before RAS or self refresh

2.3.3VIA VT82C686B South Bridge

The VT82C686B PSIPC (PCI Super-I/O Integrated Peripheral Controller) is a high integration, high performance, power-efficient, and high compatibility device that supports Intel and non-Intel based processor to PCI bus bridge functionality to make a complete

Microsoft PC99-compliant PCI/ISA system. In addition to complete ISA extension bus functionality, the VT82C686B includes standard intelligent peripheral controllers:

„Master mode enhanced IDE controller with dual channel DMA engine and interlaced dual channel commands. Dedicated FIFO coupled with scatter and gather master mode operation allows high performance transfers between PCI and IDE devices. In addition to standard PIO and DMA mode operation. The VT82C686B also supports the UltraDMA-33, UltraDMA-66, and UltraDMA-100 (ATA-100) standards. The IDE controller is SFF-8038I v1.0 and Microsoft Windows-family compliant.

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Universal Serial Bus controller that is USB v1.1 and Universal HCI v1.1 compliant. The VT82C686B includes the root hub with four function ports with integrated physical layer transceivers. The USB controller allows hot plug and play and isochronous peripherals to be inserted into the system with universal driver support. The controller also implements legacy keyboard and mouse support so that legacy software can run transparently in a non-USB-aware operating system environment.

Keyboard controller with PS2 mouse support.

Real Time Clock with 256 byte extended CMOS. In addition to the standard ISA RTC functionality, the integrated RTC also includes the date alarm, century field, and other enhancements for compatibility with the ACPI standard.

„Notebook-class power management functionality compliant with ACPI and legacy APM requirements. Multiple sleep states (power-on suspend, suspend-to-DRAM, and suspend-to-Disk) are supported with hardware automatic wake-up. Additional functionality includes event monitoring, CPU clock throttling and stop (Intel processor protocol), PCI bus clock stop control, modular power, clock and leakage control, hardware-based and software-based event handling, general purpose I/O, chip select and external SMI.

„Hardware monitoring subsystem for managing system / motherboard voltage levels, temperatures, and fan speeds

„Full System Management Bus (SMBus) interface.

„Two 16550-compatible serial I/O ports with infrared communications port option on the second port.

8ECB-862/862L User’s Manual