After an Enable cycle of WDT, user must immediately execute a Refresh cycle to WDT before its period setting comes to an end every 1, 2, 10, 20, 110 or 220 seconds. If the Refresh cycle does not activate before WDT period cycle, the onboard WDT architecture will issue a Reset or NMI cycle to the system. There are three I/O ports that control the Watchdog Timer.
443H | I/O Read | The Enable cycle |
443H | I/O Read | The Refresh cycle |
045H | I/O Read | The Disable cycle |
The following sample program shows how to Enable, Disable and Refresh the Watchdog Timer:
WDT_EN_RF | EQU | 0433H |
|
WDT_DIS | EQU | 0045H |
|
WT_Enable | PUSH | AX | ; keep AX DX |
| PUSH | DX |
|
| MOV | DX,WDT_EN_RF | ; enable the WDT |
| IN | AL,DX |
|
| POP | DX | ; get back AX, DX |
| POP | AX |
|
| RET |
|
|
WT_Refresh | PUSH | AX | ; keep AX, DX |
| PUSH | DX |
|
| MOV | DX,WDT_ET_RF | ; refresh the WDT |
| IN | AL,DX |
|
| POP | DX | ; get back AX, DX |
| POP | AX |
|
| RET |
|
|
WT_DISABLE | PUSH | AX |
|
| PUSH | DX |
|
| MOV | DX,WDT_DIS | ; disable the WDT |
| IN | AL,DX |
|
| POP | DX | ; get back AX, DX |
| POP | AX |
|
| RET |
|
|
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