Intel IA-32 Table 9-7. Microcode Update Format, Table 9-6. Microcode Update Field Definitions (Contd.)

Vol. 3A 9-39
PROCESSOR MANAGEMENT AND INITIALIZATION
Checksum[n] Data Size +
76 + (n * 12) 4 Used by utility software to decompose a microcode update into multiple microcode updates where each of
the new updates is constructed without the optional
Extended Processor Signature Table.
To calculate the Checksum, substitute the Primary
Processor Signature entry and the Processor Flags
entry with the corresponding Extended Patch entry.
Delete the Extended Processor Signature Table
entries. The Checksum is correct when the summation
of all DWORDs that comprise the created Extended
Processor Patch results in 00000000H.
Table 9-7. Microcode Update Format
31 24 16 8 0 Bytes
Header Version 0
Update Revision 4
Month: 8 Day: 8 Year: 16 8
Processor Signature (CPUID) 12
Res: 4 Extended Family: 8 Extended Mode: 4 Reserved: 2 Type: 2 Family: 4 Model: 4 Stepping: 4
Checksum 16
Loader Revision 20
Processor Flags 24
Reserved (24 bits)
P7 P6 P5 P4 P3 P2 P1 P0
Data Size 28
Total Siz e 32
Reserved (12 Bytes) 36
Update Data (Data Size bytes, or 2000 Bytes if Data Size = 00000000H) 48
Extended Signature Count ‘n’ Data Size
+ 48
Extended Processor Signature Table Checksum Data Size
+ 52
Reserved (12 Bytes) Data Size
+ 56
Table 9-6. Microcode Update Field Definitions (Contd.)
Field Name Offset
(bytes) Length (bytes) Description