BIOS

Intel® Server Board SE7501WV2 TPS

6.40.2PCI Error Events

The following table defines the data byte formats for PCI bus-related errors logged by the BIOS.

Table 55. PCI Error Event Data Field Contents

Field

IPMI Definition

BIOS Specific Implementation

Generator ID

7:1 System software ID or IPMB slave

7:4 0x3 for system BIOS

 

address. 1=ID is system software ID;

3:1

 

0=ID is IPMB slave address.

0 Format revision, Revision of the data format for

 

 

 

 

OEM data bytes 2 and 3, For this revision of the

 

 

specification, set this field to 0. All other revisions are

 

 

reserved for now.

 

 

0 1=ID is system software ID

 

 

As a result, the generator ID byte will start from 0x31 and

 

 

go up to 0x3f, in increments of 2 for events logged by the

 

 

BIOS.

 

 

 

Sensor Type

See Table 34.3, Sensor Type Codes, in the

0x13 for critical interrupt

 

Intelligent Management Platform Interface

 

 

Specification v1.5.

 

Sensor number

Number of sensor that generated this event

Unique value for each type of event because IPMI

 

 

specification requires it that way. This field has no other

 

 

significance. Should not be displayed to the end user if the

 

 

event is logged by BIOS. For PERRs, the sensor number

 

 

is 0xEA, for SERRs, the sensor number is 0xEB.

 

 

 

Type code

0x6F if event offsets are specific to the sensor

0x6F

Event Data 1

7:6 00 = unspecified byte 2

Follows the IPMI definition.

 

10 = OEM code in byte 2

If either of the two data bytes following this do not have

 

5:4 00 = unspecified byte 3

any data, that byte should be set to 0xff, and the

 

10 = OEM code in byte 3. (BIOS will not

appropriate filed in event data 1 should indicate that that it

 

is unspecified.

 

use encodings 01 and 11 for errors

 

According to Table 30.3 in the Intelligent Management

 

covered by this document.)

 

3:0 Offset from Event Trigger for discrete

Platform Interface Specification, 3:0 is 04 for PCI PERR

 

and 05 for PCI SERR.

 

event state.

 

 

 

 

 

Event Data 2

7:0 OEM code 2 or unspecified

For format rev 0, if this byte is specified, it contains the

 

 

PCI bus number on which the failing device resides. If the

 

 

source of the PCI error cannot be determined, this byte

 

 

contains 0xff and the event data 1 byte indicates that byte

 

 

2 is unspecified.

Event Data 3

7:0 OEM code 3 or unspecified.

For format rev 0, if this byte is specified, it contains the

 

 

PCI device/function address in the standard format:

 

 

7:3 Device number of the failing PCI device

 

 

2:0 PCI function number. Will always contain a zero if the

 

 

device is not a multifunction device.

 

 

If the source of the PCI error cannot be determined, this

 

 

byte contains 0xff and the event data 1 byte indicates that

 

 

byte 3 is unspecified.

120

Revision 1.0

 

Intel reference number C25653-001

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Intel SE7501WV2 manual PCI Error Events, PCI Error Event Data Field Contents

SE7501WV2 specifications

The Intel SE7501WV2 is a versatile server motherboard designed to meet the demanding needs of modern computing environments. Engineered with a focus on performance, reliability, and flexibility, this motherboard is tailored for a range of applications, from entry-level servers to high-performance computing tasks.

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