Intel 6300ESB ICH, Xeon user manual Platform IRQ Routing, IRQ Routing Diagram, System Overview

System Overview

5.5Platform IRQ Routing

Figure 9 shows that the Intel 6300ESB I/O Controller uses these segments:

•IRQ14 and 15 for IDE segment

•SERIRQ for SIOPIXRQ segment

•PCRIRQ for the PCI-X segment

•PIRQ for the PCI 32/33 segment

A Message Signalled Interrupt (MSI) scheme is used between the MCH and PXH over the PCI Express bus. The PXH uses PAIRQ for the Channel A interface to PCI-X 64-bit/100 MHz peripherals and PBIRQ for the Channel B interface to PCI-X 64/133. MSI and Non Maskable Interrupt (NMI) are connected from the Intel 6300ESB I/O Controller to CPU0 and CPU1. The platform also supports MSI for maskable and non-maskable interrupts.

Figure 9. IRQ Routing Diagram

	MSI	￿￿￿
		￿￿￿
	NMI
CPU0
		￿￿￿
	SMI

	MSI
CPU0	NMI
	SMI

PCI-E	PCI-E	PCI-X SLOT	PCI-X SLOT	PCI-X SLOT
4x	8x	REQ/GNT: 0	REQ/GNT: 0	REQ/GNT: 1
MSI	MSI	IDSEL: AD17	IDSEL: AD17	IDSEL: AD18
		A B C D	A B C D	A B C D

PAIRQ

0

64/133X-PCI

2.0X-PCI

1

2

3

FSB

E-PCI

MSIMSIMSI

￿￿￿￿￿￿￿￿￿￿

MSI

PXH

PBIRQ

0

64/100X-PCI

1

￿￿￿￿￿

2

4

￿￿

3

IDE

5

6

MCH

7

MSI

PCI-X SLOT

Video

REQ/GNT: 0

REQ/GNT: 1

HI

MSI

IDSEL: AD16

IDSEL: AD17

A

B C D

A

MSI

PIRQ

Intel￿

E

X-PCI32/33

IDSEL: AD17

IDSEL: AD18

IRQ14/15

A

B

C

PCI-X SLOT

PCI-X SLOT

D

REQ/GNT: 0

REQ/GNT: 1

6300ESB

F

A B C D

A B C D

NMI

I/O

G

Controller

SMI

Hub

PXIRQ

H

64/66X-

C

A

B

￿￿￿￿￿￿￿￿

SERIRQ

D

PCI

SIO

Intel® Xeon™ Processor, Intel® E7520 Chipset, Intel® 6300ESB ICH Development Kit User’s Manual 29