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Intel Xeon, 6300ESB ICH user manual Platform Clocking, Clock Block Diagram, Hilai$, System Overview

Models: 6300ESB ICH Xeon

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System Overview

5.2Platform Clocking

Figure 6.

SMA

The CRB uses one CK409B Clock Synthesizer to generate the host differential pair clocks and the
100 MHz differential clock to the DB800. The DB800 then generates the 100 MHz differential pair

clock for the PCI Express* devices. Figure 6 shows the CRB clock configuration.
		CPU0
Clock Block Diagram
		ITP			DDRA
		CPU1
$	$		Intel		X-
			I/O		DDRB
			MCH		DDRB		PCI-X


				PCI			PCI-X
				PCI			! !
			6300ESB
!			Controller
			Hub
							PXH
%&"#!		HILAI$			#	!'
$			SIO
			Video				PCI Express Slot
			Video		#!		PCI Express Slot
!!			FWH
							PCI Express Slot
			Port 80
			PCI 2.2	DB800
				DB800

CK-409

26Intel® Xeon™ Processor, Intel® E7520 Chipset, Intel® 6300ESB ICH Development Kit User’s Manual

Page 26

Image 26

Intel Xeon, 6300ESB ICH user manual Platform Clocking, Clock Block Diagram, Hilai$, System Overview

Contents

User’s Manual SeptemberContents Contents ContentsProcessor Heat Sink Installation Instructions ContentsHeatsink Assembly Level 3 Debug Voltage ReferencesContents FiguresTables Date Revision HistoryContents Revision1.1 Related Documents 1.2 Product ContentsProduct Overview Product Overview1.3 Products Feature List Product Overview1.4 Block Diagram Product OverviewProduct Overview Figure 2. Placement - TopView+$&0,,+ 1&1$ 1&0..&01.4.1 Memory Subsystem 1.4.2 DIMM Placement DDR2DIMM Placement DDR2 Supported DIMM Module TypesProduct Overview 1.5 Memory Population Rules and ConfigurationsFigure 3. DDR2 400 Memory - DIMM Ordering 2.2 Soft Off 2.1 Power ButtonPlatform Management 2.3 Sleep States Supported2.3.4 S3 State 2.3.2 S1 State2.3.3 S2 State 2.3.5 S4 State2.3.6 S5 State 2.4 PCI PM Support2.5 Platform Management 2.3.7 Wake-Up EventsPlatform Management 2.6 System Fan Operation2.5.1 Processor Thermal Management Equipment Required for CRB Usage 3.1 PrecautionsEquipment Required for CRB Usage 3.2.1 Drivers included on CD 3.2.1.1 Red Hat 8.0 Compatible Driver Package Contents3.2 Driver and OS Requirements Equipment Required for CRB UsageEquipment Required for CRB Usage This operating system compatible driver package is available fromEquipment Required for CRB Usage 3.2.1.3 Windows Compatible Driver Package Contents3.2.1.4 Third Party Drivers Jumpers and Headers Jumpers and Headers4.1 Jumpers Jumpers and Headers Jumper Settings Sheet 1 ofDescription/Settings Ref DesJumpers and Headers Jumper Settings Sheet 2 ofDescription/Settings Ref DesJumpers and Headers Jumper Settings Sheet 3 ofDescription/Settings Ref DesSystem Overview 5.1 Power DiagramsBlock Diagram System OverviewHILAI$ Clock Block Diagram5.2 Platform Clocking System OverviewPCI -E 5.3 Platform ResetsPlatform Reset Diagram System OverviewSystem Overview SMBus Block Diagram5.4 SMBus IntelSystem Overview Figure 9. IRQ Routing Diagram5.5 Platform IRQ Routing System Overview Processor VRD Settings Sheet 1 of5.6 VRD VID Headers Processor VRD Settings Sheet 2 of System OverviewSystem Overview Power Buttons5.7 Miscellaneous Buttons IntelDebug Procedure Debug Procedure6.1 Level 1 Debug Port 80/BIOS Level 1 Debug Port 80/BIOS6.3 Level 3 Debug Voltage References 6.2 Level 2 Debug Power SequenceLevel 2 Debug Power Sequence Level 3 Debug Voltage ReferencesComponents Requiring Heat Sink Assembly Heatsink AssemblyHeatsink Assembly Figure 11. Components Requiring Heat Sink AssemblyFigure 12. Inserting Processor in Socket 7.1 Processor Heat Sink Installation InstructionsFigure 13. Cleaning the Processor Surface Heatsink AssemblyHeatsink Assembly Figure 14. Installing the Processor BackplateFigure 15. Removing the Protective Covers Remove plasticFigure 16. Installing the Heatsink Heatsink Assembly

5.2Platform Clocking

Clock Block Diagram

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