Lucent Technologies USS-720 manual Features, Description, Preliminary Data Sheet, Rev September

Preliminary Data Sheet, Rev. 5

September 1999

USS-720Instant USB™

USB-to-IEEE*1284 Bridge

Features

■Supports standard PC parallel port register-based operation

Device Features:

■Full compliance with the Universal Serial Bus Specifi- cation Revision 1.0

■On-chip transceivers for USB

■Low power consumption allows part to be powered from USB connection

■Dual on-chip USB packet buffers for fast response

■Fully compatible USB host device drivers available

■Fully compliant with USB printer device class specifi- cation

■Implemented in Lucent Technologies Microelectron- ics Group’s 0.35 μm, 3 V standard-cell library

■Complete single-chip solution in a 44-pin MQFP

■Evaluation kit available

IEEE 1284 (Parallel) Features:

■Transparent, fully automatic support for true bidirec- tional communication

■Hardware initiates and manages automatic negotia- tion for the fastest protocol available

■Support of multiple logical channels

■Maximum throughput: 1.216 Mbytes/s (ECP mode)

Description

The USS-720 integrated circuit connects an IEEE 1284 parallel port peripheral to the universal serial bus (USB). It is designed to be a low-cost, single-chip embedded solution requiring minimal external components. It is suitable for a wide range of applications, from integrated applications where the IC is mounted on a printed- circuit board inside a product, to stand-alone applica- tions where the chip provides a standard parallel port to a USB-capable computer. The USS-720 software included in the Evaluation Kit allows peripheral vendors to evaluate and test the USS-720 device, which is embedded in the Centronics† end of a USB-to-parallel port cable provided with the kit. This solution requires no firmware changes on the parallel port peripheral.

*IEEE is a registered trademark of The Institute of Electrical and Electronics Engineers, Inc.

†Centronics is aregistered trademark of Centronics Data Com- puter Corporation.

USS-720

		BUFFER		PLL	OSCILLATOR
		RAM
			CONTROL
			AND INTERFACE	IEEE 1284	IEEE 1284
			LOGIC	HOST	BUFFERS
		SELECT LOGIC
USB	USB	UDC	NONVOLATILE	EEPROM
PORT	XCVR	CORE
			CONFIGURATION	INTERFACE

EXTERNAL SERIAL EEPROM

Figure 1. Block Diagram

IEEE 1284

PARALLEL

PORT

PERIPHERAL

13

5-5109a.r6

Note: Advisories are issued as needed to update product information. When using this data sheet for design purposes, please contact your Lucent Technologies Microelectronics Group Account Manager to obtain the latest advisory on this product.

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