Lucent Technologies USS-720 manual Preliminary Data Sheet, Rev, September, USB-to-IEEE 1284 Bridge

Preliminary Data Sheet, Rev. 5									USS-720Instant USB
September 1999								USB-to-IEEE1284 Bridge
IEEE 1284 Port (continued)
ECP Command Register
Table 26. ECP Command Register
			ECP Command Register							Address: 5
Bit		7	6	5	4		3	2		1	0
Symbol		C7	C6	C5	C4		C3	C2		C1	C0
Access		Write	Write	Write	Write		Write	Write		Write	Write
Default		X	X	X	X		X	X		X	X
Bit	Symbol					Bit Description
7—0	C7—C0		ECP Command. This register is equivalent to the ECP Address FIFO Register in a
			standard host-side parallel port controller chip, but has some different restrictions on
			its usage. The register is writable when Auto Mode is 0 and the Mode field in the
			Extended Control Register is set to 011 and there is no ECP data in either the Bulk
			Out buffers or in the process of being transmitted. Writes to this address in a mode
			other than 011 will be ignored; writes while in mode 011 and when the hardware is
			busy will generate a NAK. The value written to this register will be transferred to the
			peripheral as an ECP command.

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