Device Terminating an Ultra DMA Data Out Burst | Maxtor 2R015H1

AT INTERFACE DESCRIPTION

DMARQ (device)

DMACK-

(host)

STOP (host)

DDMARDY-

(device)

HSTROBE

(host)

DD(15:0)

(host)

DA0, DA1, DA2,

CS0-, CS1-

tLI	tMLI	tACK
tRP		tIORDYZ
tRFS
tLI	tMLI	tACK
	tDVS	tDVH
		CRC
		tACK

Figure 5 - 13

Device Terminating an Ultra DMA Data Out Burst

5 – 10

Image 34

Maxtor 2R015H1, 2R010H1 specifications Device Terminating an Ultra DMA Data Out Burst

Contents

Hard Disk Drive Specifications Models 2R015H1 & 2R010H1 Before You Begin U T I O N Contents Product Specifications Handling and Installation AT Interface Description Interface CommandsHost Software Interface Service and Support Glossary Figures ManualOrganization IntroductionMaxtorCorporation Abbreviations Conventions Key Features Product Description Product Features Functional / Interface CacheManagement Major HDA Components Jumper Location / Configuration SubsystemConfigurationCylinder Limitation Jumper Description PerformanceSpecifications ProductSpecificationsDrive Configuration Models and Capacities Physical Dimensions EPA Energy Star Compliance PowerRequirementsPower Mode Definitions Environmental Limits Reliability Specifications Shock and Vibration Safety Regulatory Compliance EMC/EMI HardDriveHandlingPrecautions HandlingandInstallationElectro-StaticDischargeESD UnpackingandInspection Multi-pack Shipping Container PhysicalInstallation Repacking Before You Begin Hook up Set up Start up PinDescriptionSummary InterfaceConnectorATInterfaceDescription PIN IGN AL PIN Name Signal Name Signal Desc Ription Pin Description Table IM in G Paramet ERS Mode PIO Timing Imin G Paramet ERS Mode DMATiming Ultra DMA Timing Mode Sustained Ultra DMA Data In Burst Device Terminating an Ultra DMA Data In Burst Initiating an Ultra DMA Data Out Burst Device Pausing an Ultra DMA Data Out Burst Device Terminating an Ultra DMA Data Out Burst Task File Registers HostSoftwareInterfacePOR T EAD WR ITE Conten TS LBA Bits CommandRegister Seek, Format, and Diagnostic Commands Summary M M a N D N a M E M M a N D code PA R a M E T E R S U S E D Control Diagnostic Registers Reset and Interrupt Handling InterfaceCommands ReadCommands Read DMA WriteCommands Write Multiple VAL UE DES C RIP Tion ModeSet/CheckCommandsLE VE L VAL UE Omman D PowerModeCommands Timer VAL UE TIME-OUT Period Sleep Mode InitializationCommands Or D ENT Desc Ription Or D 15- 10, as c urrently defined Initialize Drive Parameters Seek,FormatandDiagnosticCommands ER ROR Code Desc Ription A.R.T. CommandSet Key Register No Quibble Service ServiceandSupportService Policy Product Support From Dial Glossary Channel Correctable errorCentral processing unit CPU Character Error correction code ECC Direct accessDirect memory access DMA Error free Frequency response Hard errorHead disk assembly HDA Gigabyte GB Logic Late windowLatency Logical address Random access memory RAM Phase locked loop PLLPhase margin Read gate signal Sequential access Sector pulse signalSeek complete signal Soft error Unrecoverable error Strobe offset signalUn-correctable error Write gate signal