MEMORY MAP

Following is the memory map for this development board. Consult the 68HC912D60 technical reference manual on the CD for internal memory map details for this processor.

FFFF

CONFIG 1

2

3

4

CONFIG 1

2

3

4

CONFIG 1 2 3 4

 

 

ON

ON

ON

ON

ON

ON

ON

OFF

OFF OFF OFF OFF

 

 

External EPROM

 

 

 

 

 

 

 

U6/7 (Mon12)

 

 

 

 

 

C000

 

 

 

 

 

 

 

BFFF

 

 

 

 

 

 

 

 

 

 

 

External RAM

Internal Flash Memory

 

 

 

 

 

U4/5

On-Chip

 

 

External RAM

 

 

 

 

 

 

 

 

 

 

 

 

U4/5

 

 

 

 

 

1000

 

 

 

 

 

 

 

FFF

 

 

 

 

 

 

C00

 

 

HC12 Internal EEPROM On-Chip

 

 

 

 

 

 

 

 

BFF

 

Peripheral Area - see note 2 below

 

 

 

 

 

Unused = A00-B7F

 

 

CS5 = BD0-BDF

CS2 = BA0-BAF

 

 

LCD / CS7 = BF0-BFF

 

 

CS4 = BC0-BCF

CS1 = B90-B9F

A00

 

CS6 = BE0-BEF

 

 

CS3 = BB0-BBF

CS0 = B80-B8F

 

 

 

 

 

 

9FF

Internal Registers - see note 1 below

 

 

800

 

See 68HC912D60 Technical Reference Manual

 

 

 

 

 

 

 

7FF

 

 

 

 

 

 

000

 

 

 

 

Internal RAM On-Chip

 

 

 

 

 

 

 

 

 

1.The Internal Register base address is relocated from $000 to $800 on startup by the debug utilities (Mon12 and NoICE). To preserve this memory map, you must also do this in your software when booting from flash. To do this, load register $11 with $08 for

example:

MOVB #08,$11

; post-reset location of INITRG

2.The Peripheral Area (A00-BFF) is set to Narrow (8-bit) data width by the debug utilities. If using this memory, you must also do this in your software when booting from flash as

follows:

MOVW

#$0CF0,PEAR

MOVB

#$73,MISC ; Flash on, p-sel stretch = 3

9

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Image 9
Motorola CME-12D60 manual Memory MAP, Peripheral Area see note 2 below