Index
DAQArb 5411 User Manual I-2
©
National Instruments Corporation
phase-locked loops, 4-22to 4-24
architecture (figure), 4-22
master/slave operation, 4-23 to4-24
RTSI trigger lines, 4-27to 4-28
triggering, 4-11to 4-16
burst trigger mode, 4-15 to4-16
continuous trigger mode,
4-13 to 4-14
modes of operation, 4-12to 4-16
single trigger mode, 4-12to 4-13
stepped trigger mode, 4-14to 4-15
trigger sources, 4-11to 4-12
update rate, 4-3
waveform generation, 4-2to 4-3
Bbuffer size, 4-6
buffers
minimum buffer size and resolution, 4-5
waveform buffer, 4-5
bulletin board support, C-1
burst trigger mode
Arb mode, 4-15to 4-16
DDS mode, 4-16
bus interface specifications, A-4
Ccables
part numbers for recommended
cables,1-5
requirements for getting started, 1-2
calibration, 4-28
clock specifications
external clock reference input, A-6
internal clock, A-6
configuration. See installation and
configuration.
connectors. See I/O connector; SHC50-68
50-pin cable connector.
continuous trigger mode
Arb mode, 4-14
DDS mode, 4-14
overview, 4-13
customer communication, x, C-1 toC-2
DDAQArb 5411. See also Arb operation.
block diagram, 4-1
cabling, 1-5
features, 1-1to 1-2
locking toNational Instruments cards
over RTSI bus (note), 3-3
optional equipment, 1-5
requirements for getting started, 1-2
software programming choices, 1-3to 1-4
National Instruments application
software, 1-3to 1-4
NI-DAQ driver software, 1-4
unpacking, 1-6
DDS mode. See direct digital synthesis (DDS)
mode.
DGND signal (table), 3-6
Dig Out connector, 3-4 to3-5
pin assignments (figure), 3-5
signal descriptions (table), 3-6
digital pattern generation, 4-25to 4-27
data path (figure), 4-26
timing (figure), 4-26
digital pattern output specifications, A-5
digital trigger specifications, A-4
direct digital synthesis (DDS) mode,
4-8to 4-11
burst trigger mode, 4-16
continuous trigger mode, 4-14
DDS building blocks (figure), 4-9
definition, 4-8