CHAPTER 1 GENERAL INFORMATION
System Configuration
NEAX2000 IVS2 Q-SIG System Manual
ND-70923 (E), Issue 1.0 Page 9
PLO
The Phase Locked Oscillator (PLO) equipped on the MP card is responsible to synchronize the
system to Q-SIG clocks.
The PLO generates the clock signals according to the source clocks received from network. The
source clock signals are extracted at DTI cards and supplied to the PLO. Two clock routes are
available; one is the Route 0 to receive clock signals fr om DTI0, and the other is a standb y Route
1 (DTI1) to receive clock signals when no clock signals appear on the Route 0. When clock
signals come from neither the Route 0 nor the Route 1, the PLO keeps generating the clock
signals with the frequency of previo us source clock. The PLO can receiv e different frequency of
source clocks from the Route 0 and Route 1.
Figure 1-6 shows an example of clock supply route.

Figure 1-6 Clock Supply Route Configuration

PBX
TDSW
DTI1
PLO
NETWORK
DTI0
: CLOCK SIGNAL SUPPLY R OUTE 0
: CLOCK SIGNAL SUPPLY R OUTE 1
Q-SIG
NOTE: DTI0 and DTI1 must be mounted in PIM0.
NOTE