Post Codes
Award POST Codes
Co | Name | Description |
de |
|
|
| Check |
|
8E | Reserved |
|
8F | IRQ12 Enable | Enable IRQ12 if mouse present |
90 | Reserved |
|
91 | Reserved |
|
92 | Reserved |
|
93 | Boot Medium | Detect and store boot partition head and cylinders |
| Read | values in RAM |
94 | Final Init | Final init for last micro details before boot |
95 | NumLock | Set NumLock status according to Setup |
96 | Boot Attempt | Set low stack Boot via INT 19h. |
C0 | Base CPU test | Read/Write CPU registers |
C1 | Memory Presence | Base memory detect |
C2 | Early Memory | Board Initialization |
C3 | Extend Memory | Turn on extended memory, cache initialization |
C4 | Special Display | First display initialization |
C5 | Early Shadow | Early shadow enable for fast boot |
C6 | Cache presence | External cache size detection |
CF | CMOS Check | CMOS checkup |
B0 | Spurious | If interrupt occurs in protected mode. |
B1 | Unclaimed NMI | If unmasked NMI occurs, display Press F1 to disable |
|
| NMI, F2 reboot. |
BF | Program MCP | To program chipset from defaults values |
E1- | Setup Pages | E1- Page 1, E2 - Page 2, etc. |
EF |
|
|
FF | Boot |
|
|
|
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NVIDIA Corporation
October 17, 2007
