CYCLE |
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| M1 |
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| Basictiming | TimingDiagram | MSM80C154S/83C154S |
STEP |
| S1 | S2 | S3 | S4 | S5 | S6 | S1 | S2 | S3 | S4 | S5 | S6 | S1 | S2 | S3 | S4 | S5 | S6 | S1 | S2 | S3 | S4 | S5 | S6 | |||
XTAL 1 | 1 |
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0 |
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ALE | 1 |
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0 |
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294 |
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1 |
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PSEN |
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0 |
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RD/WR | 1 |
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0 |
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| DPL&Rr |
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| 1 |
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| PCL |
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| PCL |
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| PCL |
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| ACC & RAM |
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| PCL |
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| PCL |
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| PCL |
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0 |
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1 | PCH |
| PCH |
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| PCH |
| PCH |
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| DPH & PORT DATA |
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| PCH |
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| PCH |
| PCH |
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0 |
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| DATA STABLE |
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| DATA STABLE |
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| 1 |
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CPU¬PORT 0 |
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PORT¬CPU | 1 |
| PORT OLD DATA |
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| PORT NEW DATA |
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0 |
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| Instruction decoding |
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| Instruction decoding |
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| Instruction decoding |
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| Instruction execution |
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| Instruction execution |
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| Instruction execution |
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| PC+1 |
| PC+1 |
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| PC+1 |
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| PC+1 |
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| PC+1 |
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| TM+1 |
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| TM+1 |
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| TM+1 |
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| TM+1 |
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| ¡ | ||
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| External data memory instruction |
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| Semiconductor | |||
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| Port output/input |
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| execution |
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| Port output/input |
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| instruction execution |
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| instruction execution |
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