MSM80C154S/83C154S |
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| ¡ Semiconductor | |||
I/O control register (IOCON) |
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NAME | ADDRESS | MSB |
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| LSB |
7 | 6 | 5 |
| 4 | 3 | 2 | 1 | 0 | ||
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IOCON | 0F8H | — | T32 | SERR |
| IZC | P3HZ | P2HZ | P1HZ | ALF |
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BIT LOCATION | FLAG |
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| FUNCTION |
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IOCON.0 | ALF | If CPU power down mode (PD, HPD) is activated with this bit set to "1", the | ||||||||
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| outputs from ports 0, 1, 2, and 3 are switched to floating status. |
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| When this bit is "0", ports 0, 1, 2, and 3 are in output mode. |
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IOCON.1 | P1HZ | Port 1 becomes a high impedance input port when this bit is "1". |
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IOCON.2 | P2HZ | Port 2 becomes a high impedance input port when this bit is "1". |
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IOCON.3 | P3HZ | Port 3 becomes a high impedance input port when this bit is "1". |
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IOCON.4 | IZC | The 10 kW | ||||||||
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| is "1", leaving only the 100 kW |
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IOCON.5 | SERR | Serial port reception error flag. |
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| This flag is set to "1" if an overrun or framing error is generated when data is | ||||||||
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| received at a serial port. |
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| The flag is reset by software. |
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IOCON.6 | T32 | Timer/counters 0 and 1 are connected serially to from a | ||||||||
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| when this bit is set to "1". |
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| TF1 of TCON is set if a carry is generated in the |
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IOCON.7 | — | Leave this bit at "0". |
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