
| Functional Details | |
+5 V | 47 kΩ | + V |
JP1 |
|
|
Internal jumper |
| External |
disabled (placed on |
| |
|
| |
center pin only) |
|
|
|
| DIO0 |
|
| DIO1 |
|
| DIO2 |
|
| DIO3 |
|
| DIO4 |
|
| DIO5 |
|
| DIO6 |
|
| DIO7 |
Figure 18. Digital I/O external resistor configuration
Counter input terminals (CTR0, CTR1)
Two
Refer to the "Screw terminal pin out" diagrams starting on page 11 for the location of these pins. The internal counter increments when the TTL levels transition from low to high. The counter can count frequencies of up to 1 MHz.
23