DMAEN - enables / disables DMA. When set, logic 1, DMA transfers are enabled.
DMACT - enables the
DMACH - indicates which of the
LEVEL - selects the edge of the external trigger input. When set, logic 1, A/D conversions will begin on the falling edge of the external trigger input. When cleared, logic 0, conversions will begin on the rising edge of the external trigger. IMPORTANT: LEVEL must be logic 0 when internal triggering is used.
TRIG - selects between internal and external triggers. When set, logic 1, the external trigger is selected.
CLK - selects between internal and external clock sources. When set, logic 1, the external clock source is selected.
RUN - when set, logic 1, the A/D converter is placed in the 'run' mode and will begin converting data when a trigger is received. RUN may be cleared at any time by writing a "0" to it. When using DMA transfers, RUN is automatically cleared when a terminal count is received with DMACT set to "0".
EOC - when set, indicates an end of conversion has taken place and the data is available in the A/D converter data register.
VALID - when set, logic 1, indicates at least one data sample was lost because it was read by the computer before the next sample was converted. The data was lost because the sampling rate was too fast for the computer to acquire data. VALID is reset by writing to the start conversion register.
CHSL2, CHSL1, CHSL0 - select the multiplexer channel for the analog input signal.
CHSL2 | CHSL1 | CHSL0 | MUX channel |
0 | 0 | 0 | channel 0 |
0 | 0 | 1 | channel 1 |
0 | 1 | 0 | channel 2 |
0 | 1 | 1 | channel 3 |
1 | 0 | 0 | channel 4 |
1 | 0 | 1 | channel 5 |
1 | 1 | 0 | channel 6 |
1 | 1 | 1 | channel 7 |
26 |
