18
JTAG Debug Interface
The Pico E‐14 is equipped with a JTAG diagnostic port that allows real‐time debugging of hardware, firmware and software. Use of the external JTAG port disables four external GPIO pins as well as the internal JTAG loop back.
Some JTAG programs require the length of the instruction register (IR). The IR length is listed below for all devices in the JTAG chain.
Device | Instruction register bit length |
| |
| FX20 |
| FX60 |
FPGA | 10 |
| 14 |
TurboLoader | 8 |
| |
Ethernet PHY | 8 |
| |
TDI
FPGA
PowerPC
FX20:IR=IR10= 10
FX60: IR = 14
Turbo Loader
IR= 8
Ethernet
IR= 8
TDO
Figure 4
The Primary Image in the Flash ROM contains an embedded JTAG diagnostic port. This allows a user in Windows or Linux to debug software without an external JTAG cable. The internal JTAG diagnostic loop back looks just like a Parallel Port IV diagnostic cable when used with the Pico E‐14 driver.
E‐14 Hardware Reference Manual | www.picocomputing.com | Pico Computing, Inc. |
