Pico Communications E-14 manual Appendix G Fpga Performance Enhancements

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Appendix G – FPGA Performance Enhancements

Overview:

Like most silicon devices, the FPGA on the Pico can be overclocked if proper cooling techniques are employed. Care must be taken to avoid thermal runaway.

Thermal Runaway:

As the die temperature of the FPGA increases, it draws more current. This extra current gets turned into heat. If thermal equilibrium is not reached with proper cooling, the FPGA will overheat or overstress the power supplies. In all lab tests, the FPGA core power supply shut down before the FPGA could be damaged by an over temperature condition (although this behavior is not guaranteed). The maximum FPGA core temperature is 150°C. Note that chips surrounding the FPGA will be damaged by temperatures above 85°C.

Heat Sink Placement:

The heat sink of the FPGA is internally connected via thermal grease to the case of the CardBus card on the top side (serial number side). Placing a large heat sink on the outside of the case can allow higher performance.

Power Requirements:

Care must be taken to keep current consumption under the 1A maximum specified by the 3.3V CardBus standard. If an external power supply is available the board can be supplied 5.0V for maximum power, however, the digital interfaces will still communicate at the LVTTL 3.3V standard.

Speed Ratings:

Pico Computing uses all industrial temperature range parts where available. When a ‐10 industrial temperature speed grade FPGA is created, a ‐11 commercial speed grade part is tested to ‐10 performance ratings at the industrial temperature range. Pico computing does not guarantee that ‐10 industrial parts can be operated at ‐11 speeds when kept below 85°C.

E‐14 Hardware Reference Manual www.picocomputing.com Pico Computing, Inc.