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Pico Communications E-14 Revision History, 14.1.8.11, 14.1.8.12, E‐14 Hardware Reference Manual

Models: E-14

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Revision History

14.1.8.11

Initial public release

14.1.8.12

Updated: Electrical Specifications, JTAG Debug interface, updated part numbers

E‐14 Hardware Reference Manual

www.picocomputing.com

Pico Computing, Inc.

Page 36

Image 36

Pico Communications E-14 manual Revision History, 14.1.8.11, 14.1.8.12, E‐14 Hardware Reference Manual, Pico Computing, Inc

Contents

E‐14 Hardware Technical ReferenceRelease Hardware Version F Pico E14 Hardware ReferenceContents FeaturesI/O Interfaces AppendicesProduct Overview Pico E-14 EP Quick Reference Datasheet Mechanical SpecificationFeatures Core TechnologiesPico E‐14 Electrical Specifications Power ConsumptionPower W Power WSystem Architecture DSP SlicesDDR2 RAM Flash ROM Field Programmable Gate Array FPGA ResourcesFPGA Fabric DSP SlicePowerPC Processor PPC405x3 Processor IntroductionCPLD TurboLoader CPLD ResourcesE‐14 Hardware Reference Manual Pico Computing, IncTri‐Mode Ethernet Interface Ethernet ResourcesFlash Memory Typical Flash ROM Allocation TableByte addresses DescriptionDDR2 Memory BankFPGA BankAnalog Interface Optional 8‐Bit, 80 MSPS Analog‐to‐Digital Converter ADC8‐Bit, 165 MSPS Digital‐to‐Analog Converter DAC RS‐232 Serial Transceiver 1 Tx / 1 RxDigital Peripheral Interface Electrical SpecificationsDIAGEN State JTAGCardBus Interface PCMCIA Interface ResourcesDigital Bus Interface Electrical Specifications DCMinimum NominalJTAG Debug Interface FPGA PowerPCTurbo Loader IR= Ethernet IR=Appendix A - Peripheral I/O Connector Information NOTE Pin 1 indicator on the board is actually Pin 32 indicatorDescription BrandAppendix B - CardBus Connector Information DescriptionBrand Part NumberCardBus Connector Pull Up and Pull Down Information NameDescription ValueE‐14 Hardware Reference Manual Pico Computing, IncAppendix C - FPGA Pinout FPGA PinoutPage Page Page Page Page Page Appendix D - CPLD Pinout CPLD PinoutDescription DirectionSleep Mode Request Pin D15 turns into Address ‐1 when the Flash ROM is in 8 bit modeSLEEP E‐14 Hardware Reference ManualAppendix E - Standard Part Number Listing Standard Part Number ListingPico E‐14 EP Appendix F - Errata All versionsE‐14 Hardware Reference Manual Pico Computing, IncAppendix G - FPGA Performance Enhancements Heat Sink PlacementPower Requirements OverviewAppendix E - Analog Interface Selection Guide Resolution bitsLow Power PartRevision History 14.1.8.1114.1.8.12 E‐14 Hardware Reference ManualLegal Notices This manual is 2005 Pico Computing, Inc