Silicon Image SSD-DXXX(I)-4210 manual True IDE Multiword DMA Read/Write Access Timing

ELECTRICAL SPECIFICATION SSD-DXXX(I)-4210 DATA SHEET

3.The delay from the activation of -IORD or -IOWR until the state of IORDY is first sampled. If IORDY is inactive, then the host waits until IORDY is active before the PIO cycle can be completed. If the drive is not driving IORDY negated at tA after the activation of -IORD or -IOWR, then t5 must be met and tRD is not applicable. If the drive is driving IORDY negated at the time tA after the activation of -IORD or -IOWR, then tRD must be met and t5 is not applicable.

4.The symbols t7 and t8 apply only to modes 0, 1, and 2. For other modes, this signal is not valid.

5.IORDY is not supported in this mode.

True IDE Multiword DMA Read/Write Access Timing

This function does not apply to SiliconDrive EPs that have DMA disabled.

tM
-CS0, -CS1
			t N
			tO
DMARQ
(See Note 1)			t L
-DMACK
(See Note 2)			tJ
tI	tD	tK
-IORD
-IOWR	tE		tZ
Read Data
(D15:D00)		tF
Write Data		tG
(D15:D00)
		t H
		tG

Figure 5: True IDE Multiword DMA Read/Write Access Timing

Notes:

1.If the drive cannot sustain continuous, minimum cycle time DMA transfers, it may negate DMARQ within the time specified from the start of a DMA transfer cycle to suspend the DMA transfers in progress, and reassert the signal at a later time to continue the DMA operation.

2.This signal may be negated by the host to suspend the DMA transfer in progress.

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4210D-03DSR PAGE 15 FEBRUARY 2, 2009