![J : Digital](/images/new-backgrounds/28326/2832649x1.webp)
Note on Printed Wiring Boards
•X : parts extracted from the component side.
•z : Through hole.
• : Pattern from the side which enables seeing. (The other layers' patterns are not indicated.)
Caution: |
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Pattern face side: | Parts on the pattern face side seen from the |
(Side B) | pattern face are indicated. |
Parts face side: | Parts on the parts face side seen from the |
(Side A) | parts face are indicated. |
|
|
•Main boards is
However, the patterns of layer 2 to 5 have not been in- cluded in this diagrams.
•Replacement of IC501 and IC601 used in this set requires a special tool.
•Lead Layouts
surface
Lead layout of | CSP (chip size package) |
conventional IC |
|
Note on Schematic Diagram
•All capacitors are in ∝F unless otherwise noted. pF: ∝∝F 50 WV or less are not indicated except for electrolytics and tantalums.
•All resistors are in Ω and 1/4 W or less unless otherwise specified.
Note: | Note: |
The components identi- | Les composants identifiés par |
fied by mark 0 or dotted | une marque 0 sont critiques |
line with mark 0 are criti- | pour la sécurité. |
cal for safety. | Ne les remplacer que par une |
Replace only with part | piéce portant le numéro |
number specified. | spécifié. |
|
|
• : B+ Line.
•Power voltage is dc 3.7V and fed with regulated dc power supply from connector (CN952).
•Voltages and waveforms are dc with respect to ground under no- signal conditions.
no mark : PLAY
•Voltages are taken with a VOM (Input impedance 10 MΩ). Voltage variations may be noted due to normal production toler- ances.
•Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal production toler- ances.
•Circled numbers refer to waveforms.
•Signal path. F : Analog
J : Digital
*Replacement of IC501 and IC601 used in this set requires a spe- cial tool.
•The voltage and waveform of CSP (chip size package) cannot be measured, because its lead layout is different form that of conven- tional IC.
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