Circuit Description

transmit port each cycle. The transmit port oper- ates at twice the frequency of the receive port. The DSP writes to the other channel of each DAC via a pair of parallel-to-serial registers (U504 and U505).

DAC OUTPUTS

Three of the DAC output channels provide Sine Out, X and Y. The fourth channel is multiplexed into eight slow outputs. Two of these are the front panel CH1 and CH2 outputs when the outputs are proportional to a trace. Four of these are the Aux D/A outputs. The last two are used to provide internal offset trims to the reference and sine discriminators.

The DSP generates sine waves using direct digital synthesis. At each 4 µs cycle, the DSP calculates the next sine output value based upon the desired reference frequency. This value is output via a DAC and converted to an analog output. This output is a sampled sine wave. To convert this to a smooth, low distortion analog sine wave, the output is filtered to remove frequency components above 100 kHz (U201-203). The filter output is scaled by DAC U206 and output by driver U207. U209 discriminates the zero crossings to provide a TTL square wave at the reference frequency. This is the TTL SYNC out as well as the feedback to the phase lock loop in external reference mode.

I/O INTERFACE TO CPU BOARD

The I/O interface provides the communication pathway between the DSP Logic Board and the main CPU Board. U610 and U613 are buffers for the address and data bus connections. Both buffer chips are enabled only when the CPU Board is writing to the DSP Logic Board. This helps isolate the activity on the CPU Board from affecting cir- cuitry on the DSP Logic Board. U608 and U609 are simple D-type latches used to hold configura- tion data for the DSP Logic Board. U606 is the main decoder PAL and generates all of the chip selects and strobes needed by the DSP Logic Board.

POWER

The bulk of the digital circuitry, the DSP and the timing PALs and the interface circuits are all pow- ered by +5V from the power supply board. The ±22V from the power supply is used to generate

±15V for the op amps. ±5.6V for analog switches and op amps is generated from the ±15V supplies. The reference and sine discriminators use separ- ate ±5V supplies regulated from the ±15V supplies as well.

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SRS Labs SR850 manual DAC Outputs, Interface to CPU Board

SR850 specifications

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