Texas Instruments 4Q 2006 Multipoint-LVDS M-LVDS, Multipoint Lvds, Lvds Features, Lvds for Atca

8Multipoint-LVDS (M-LVDS)

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M-LVDS Features

•TIA/EIA-899 standard

•Driver output current

•11.3 mA vs. 3.5 mA (LVDS)

•Receiver thresholds

•50 mV vs. 100 mV (LVDS)

•Driver edge rate control

•1 ns min allows ease-of-stub design

•Contention provisions

•Driver short circuit limited to 43 mA

•Drivers, receivers and disabled devices must limit their bus voltage from

0 to 2.4 V

•Drivers are tested with 32 contending nodes

M-LVDS Devices from TI

•TIA/EIA-899 standard compliant guarantees true multipoint

•Type 1 receivers: 25-mV hysteresis to prevent oscillation

•Type 2 receivers: internal failsafe (no external bias network)

•–1-V to 3.4-V common mode

•3.3-V supply operation

M-LVDS for ATCA

•Synchronous ATCA clock signals

(8 kHz, 19.22 MHz and user defined <100 MHz) use M-LVDS.

Type 1	Type 2
	2.4 V
High	High
	150 mV
	50 mV
VID	0 mV
	–50 mV
Low	Low
	2.4 V
	Transition Region

Receiver types.

Multipoint LVDS

700Mbps

600Mbps

500Mbps

400Mbps

300Mbps

200Mbps

100Mbps

						LVDM1676
						LVDM1677
LVDM179		LVDM050
					LVDM320
LVDM180		LVDM051
								M-LVDS Receivers
LVDM176
								M-LVDS Transceivers
								M-LVDS Clock Distribution
								(see p.42 for table)
								LVDM: a version of LVDS with
		LVDM22						double the output current
					MLVD080
					MLVD082
MLVD201	MLVD2		MLVD047		MLVD128
					MLVD129
MLVD203	MLVD3		LVDM31
MLVD206
MLVD207
MLVD200A
MLVD202A
MLVD204A
MLVD205A
Single		Dual	Quad	8-Channel			16-Channel

Interface Selection Guide Texas Instruments 4Q 2006