Memory

4-10

Figure 4–4. TMS320C30 Peripheral Bus Memory-Mapped Registers
Serial port 1 data transmit
808064h Primary-buscontrol
808060h Expansion-buscontrol
80804Ch Serial port 0 data receive
808048h Serial port 0 data transmit
FSR/DR/CLKR serial port 0 control
808046h Serial port 0 R/X timer period
808045h Serial port 0 R/X timer counter
808044h Serial port 0 R/X timer control
808043h
808042h FSX/DX/CLKX serial port 0 control
Serial port 0 global control
808040h
Timer 1 period register
808038h
Timer 1 counter
808034h
Timer 1 global control
808030h
Timer 0 period
808028h
Timer 0 counter
808024h
Timer 0 global control
808020h
DMA transfer counter
808008h
DMA destination address
808006h
DMA source address
808004h
808000h DMA global control
Serial port 1 global control
808050h
FSR/DR/CLKR serial port 1 control
808056h Serial port 1 R/X timer period
808055h Serial port 1 R/X timer counter
808054h Serial port 1 R/X timer control
808053h
808052h FSX/DX/CLKX serial port 1 control
808058h
80805Ch Serial port 1 data receive