Toshiba AR-B1375 Parallel Port, Divisor Latch LS, MS, Register Address, Printer Interface Logic

AR-B1375/AR-B1376 User s Guide

(9) Divisor Latch (LS, MS)

	LS	MS
Bit 0:	Bit 0	Bit 8
Bit 1:	Bit 1	Bit 9
Bit 2:	Bit 2	Bit 10
Bit 3:	Bit 3	Bit 11
Bit 4:	Bit 4	Bit 12
Bit 5:	Bit 5	Bit 13
Bit 6:	Bit 6	Bit 14
Bit 7:	Bit 7	Bit 15

Desired	Divisor Used to	Present Error Difference
Baud Rate	Generate 16x Clock	Between Desired and Actual
50	2304	---
75	1536	---
110	1047	0.026
134.5	857	0.058
150	768	---
300	384	---
600	192	---
1200	96	---
1800	64	---
2000	58	0.69
2400	48	---
3600	32	---
4800	24	---
7200	16	---
9600	12	---
14400	8	---
19200	6	---
28800	4	---
38400	3	---
57600	2	---
Table 2-7 Serial Port Divisor Latch

2.8 PARALLEL PORT

(1) Register Address

Port Address	Read/Write	Register
base + 0	Write	Output data
base + 0	Read	Input data
base + 1	Read	Printer status buffer
base + 2	Write	Printer control latch

Table 2-8 Registers’ Address

(2) Printer Interface Logic

The parallel portion of the SMC37C669 makes the attachment of various devices that accept eight bits of parallel data at standard TTL level.

(3) Data Swapper

The system microprocessor can read the contents of the printer’s Data Latch through the Data Swapper by reading the Data Swapper address.

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