TS1G~32GCF133 | Transcend Information TS2GCF133, TS4GCF133, CF 133X

TS1G~32GCF133		133X CompactFlash Card

Transcend Information Inc.

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Image 27

Transcend Information TS2GCF133, TS4GCF133, TS8GCF133, TS1GCF133, TS16GCF133, CF 133X, TS32GCF133 dimensions TS1G~32GCF133

Contents

Description Placement FeaturesDimensions 133X CompactFlash Card Transcend Block Diagram Pin Assignments and Pin Type TS1G~32GCF133 Dir Signal Description GND Inpack Iowr VCC Wait Electrical Specification Output Drive Type Output Drive Characteristics Signal Interface Resistor is optional Additional Requirements for CF Advanced Timing Modes Table Typical Series Termination for Ultra DMA 133X CompactFlash CardUltra DMA Electrical Requirements Series termination required for Ultra DMA operation Ultra DMA Mode Cabling Requirement Attribute Memory Read Timing Specification TS1G~32GCF133133X CompactFlash Card Common Memory Read Timing Specification Common Memory Write Timing Specification Input Read Timing Specification TS1G~32GCF133 Output Write Timing Specification TS1G~32GCF133 True IDE PIO Mode Read/Write Timing Specification TS1G~32GCF133 Table Ultra DMA Data Burst Timing True IDE Ultra DMA Mode Read/Write Timing Specification 133X CompactFlash Card TS1G~32GCF133 TS1G~32GCF133 TS1G~32GCF133 Multiple Function CompactFlash Storage Cards Card Configuration Attribute Memory Function Attribute Memory Function Configuration Option Register Base + 00h in Attribute Memory TS1G~32GCF133 Pin Replacement Register Base + 04h in Attribute Memory Socket and Copy Register Base + 06h in Attribute Memory Transfer Function Table Pcmcia Mode I/O Function Table Common Memory Function Common Memory Transfer Function True IDE Mode I/O Transfer Function Metaformat Overview CF-ATA Drive Register Set Definition and Protocol Table Primary and Secondary I/O Decoding Primary and Secondary Address Configurations Table Contiguous I/O Decoding Contiguous I/O Mapped Addressing Memory Mapped Addressing True IDE Mode Addressing Data Register Address 1F0h170hOffset 0,8,9 CF-ATA Registers Cylinder Low LBA 15-8 Register Address 1F4h174h Offset Feature Register Address 1F1h171h Offset 1, 0Dh Write OnlySector Count Register Address 1F2h172h Offset Sector Number LBA 7-0 Register Address 1F3h173h Offset TS1G~32GCF133 Device Control Register Address 3F6h376h Offset Eh Card Drive Address Register Address 3F7h377h Offset Fh LBA CF-ATA Command Set Definitions Check Power Mode 98h or E5h Erase Sectors C0h Execute Drive Diagnostic 90h Format Track 50h Flush Cache E7h Data Field Type Information Identify Device Ech TS1G~32GCF133 0X00h Word 6 Default Number of Sectors per Track Word 0 General ConfigurationWord 1 Default Number of Cylinders Word 3 Default Number of Heads Word 22 ECC Count PIO Data Transfer Cycle Timing ModeWords 7-8 Number of Sectors per Card Words 10-19 Serial Number Word 64 Advanced PIO transfer modes supported Multiple Sector SettingTotal Sectors Addressable in LBA Mode Multiword DMA transfer Word 68 Minimum PIO transfer cycle time with Iordy Words 82-84 Features/command sets supported Word 88 Ultra DMA Modes Supported and Selected Words 85-87 Features/command sets enabled Word 128 Security Status Word 91 Advanced power management level valueWord 160 Power Requirement Description Word 89 Time required for Security erase unit completion Word 162 Key Management Schemes Supported Value Maximum PIO mode timing selectedValue Maximum Multiword DMA timing mode supported Value Current PIO timing mode selected Idle 97h or E3h Value Current Multiword DMA timing mode selectedValue Maximum Pcmcia IO timing mode Supported Value Maximum Memory timing mode Supported Idle Immediate 95h or E1h Initialize Drive Parameters 91hNOP 00h Read DMA C8h Read Long Sector 22h or 23h Read Buffer E4h TS1G~32GCF133 Seek 7Xh Feature Supported Set Features EFh 133X CompactFlash Card TS1G~32GCF133 Translate Sector Information Standby Immediate 94h or E0h Translate Sector 87h Wear Level F5h Write Buffer E8h Write DMA CAh TS1G~32GCF133 TS1G~32GCF133 Error Posting Smart Command Set Smart Feature Register Values Smart Command Set Decription Smart Data Structure