3.7.1 North Bridge Configuration
BIOS Setup Utility
Main Advanced PCI/PnP Boot Security Chipset Exit
NorthBridge Chipset Configuration
Memory Configuration
ECC Configuration
DRAM Timing Configuration
Memory Timing Parameters | [CPU Node 0] |
|
| |
|
|
|
| |
Memory CLK | xxx, xxx |
|
| |
CAS Latency (Tcl) | xxx, xxx | ← | Select Screen | |
RAS/CAS Delay (Trcd) | xxx, xxx | ↑↓ Select Item | ||
Row Precharge Time (Trp) | xxx, xxx | |||
Enter Go to Sub Screen | ||||
Min Active RAS (Tras) | xxx, xxx | |||
F1 | General Help | |||
RAS/RAS Delay (Trrd) | xxx, xxx | |||
F10 | Save and Exit | |||
Row Cycle (Trc) | xxx, xxx | |||
ESC Exit | ||||
Read to Precharge (Trtp) | xxx, xxx | |||
|
| |||
Write Recover Time (Twr) | xxx, xxx |
|
| |
|
|
|
|
Memory Timing Parameters
Select which node’s timing parameters to display.
CPU Node 0 / CPU Node 1
70
http://www.tyan.com