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VXI SM8000 Open Trigger Select Register - Write Only, TTL Trigger Polarity Register - Write Only

Models: SM8000

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Open Trigger Select Register – Write Only

VXI Technology, Inc.

		Open Trigger Select Register – Write Only
	ADDR	Plug-In LA+0x36
			Sets the TTLTRIG line or lines, which are configures as outputs,
			and will toggle when Relay Open condition occurs in the module.
	D15-D8		D15 corresponds to TTLTRIG7, D14 to TTLTRIG6, … and D8 to
	D15-D8		TTLTRIG0. Setting a bit to a 1 enables the trigger line, setting a

			bit to 0 disables the corresponding line. All bits are set to 0s when
			either a soft or a hard reset is received by the module.
			Sets the TTLTRIG line or lines, which are configured as inputs,
			and will cause a Relay Open event to occur in the module. D7
			corresponds to TTLTRIG7, D6 to TTLTRIG6, … and D0 to
	D7-D0		TTLTRIG0. Setting a bit to a 1 enables the trigger line, setting a
	D7-D0		bit to 0 disables the corresponding line. All enabled TTLTRIG

			lines are OR’d together to allow more than one TTLTRIG line to
			cause a Relay Open event to occur. All bits are set to 0s when the
			module receives either a soft or a hard reset.

TTL Trigger Polarity Register – Write Only

	ADDR	Plug-In LA+0x38
	D15-D14	Unused	Data written to these bits have no affect.
	D13-D8	FAIL LED Control	D13 is for module 5 … D8 is for module 0. 0 = off, 1 = on.
	D4	Board Busy	0 acts on the falling edge, 1 acts on the rising edge.
	D4	Trigger Slope	0 acts on the falling edge, 1 acts on the rising edge.
		Trigger Slope
	D3	Relay Open Input	0 acts on the falling edge, 1 acts on the rising edge.
	D3	Slope	0 acts on the falling edge, 1 acts on the rising edge.
		Slope
	D2	Relay Open Output	0 sets the falling edge active, 1 sets the rising edge active.
	D2	Slope
		Slope
	D1	Trace Advance	0 advances on the falling edge, 1 advances on the rising edge.
	D1	Input Slope
		Input Slope
	D0	Trace Advance	0 sets the falling edge active, 1 sets the rising edge active.
	D0	Output Slope
		Output Slope

Note: A hard or a soft reset sets D3-D0 to 0 s.

44	SM8000 Series Programming

Image 44

VXI SM8000 user manual Open Trigger Select Register - Write Only, TTL Trigger Polarity Register - Write Only, Addr, Unused

Contents

VXI Technology, Inc P/N Released February 132031 Main Street Irvine, CA 949 OPTICAL SWITCH USER’S MANUALVXI Technology, Inc TABLE OF CONTENTS SECTIONSECTION SECTIONCommand Set Uncalibrated Operation - Move-To-Absolute-StepWrite Example Read ExampleVXI Technology, Inc SM8000 Series PrefaceWARRANTY LIMITATION OF WARRANTYCERTIFICATION RESTRICTED RIGHTS LEGENDOptical Switch D E C L A R A T I O N O F C O N F O R M I T YVXI Technology, Inc 2031 Main StreetVXI Technology, Inc SM8000 Series PrefaceGENERAL SAFETY INSTRUCTIONS TERMS AND SYMBOLSUse Proper Power Cord Use Proper Power SourceWARNINGS CONT Avoid Electric ShockGround the Product Operating ConditionsSUPPORT RESOURCES VXI Technology World HeadquartersVXI Technology Cleveland Instrument Division VXI Technology Lake Stevens Instrument DivisionVXI Technology, Inc SM8000 Series PrefaceOVERVIEW SECTIONINTRODUCTION SM8000 SERIES - OPTICAL SWITCH CONTROLLER SM8001 / SM8002 - MULTI-CHANNEL SWITCHES ConfigurationsFIGURE 1-2 SM8001 / 8002 SWITCHES 1 x NDuplex 1 x N 2 x N BlockingSM8001 / SM8002 MULTI SWITCH SPECIFICATIONS 1 All specifications referenced without connectors780 - 1650 nm 0.6 dB typical, 1.2 dB maximumSM8003 - PRISM SWITCHES SPSTSPDT Transfer - PositionSM8003 PRISM SWITCH SPECIFICATIONS 2 Repeatability for 100 cycles at constant temperature780 - 1570 nm 0.6 dB typical, 1.1 dB maximumSM8101 / SM8102 SPECIFICATIONS ResolutionSM8101 / SM8102 - OPTICAL ATTENUATORS 0 - 10 dBCALCULATING SYSTEM POWER AND COOLING REQUIREMENTS SETTING THE CHASSIS BACKPLANE JUMPERSPREPARATION FOR USE INTRODUCTIONSETTING THE LOGICAL ADDRESS switch to 1 and the front switch toBACK FRONTswitch to C and the front switch to Divide byConvert to MSB and LSB SELECTING THE EXTENDED MEMORY SPACEService should only be performed by qualified personnel OPTICAL CONNECTIONSCleaning Optical Connectors Mating Optical ConnectorsSECTION OPERATIONGENERAL DESCRIPTION SM8003 - Prism Switches FIGURE 3-2 SM8003 PRISM SWITCHESSPST SPDTFIGURE 3-3 ATTENUATOR DIAGRAM SM8101 / SM8102 - Optical AttenuatorsOPERATION SM8001 / SM8002 - Multi-Channel SwitchesResetting the Switch Relay Registers - Output Channel Selection1 x N Switch Configuration RESETFIGURE 3-4 1 X N SWITCH CONFIGURATION TABLE 3-1 CONTROL CODES FOR 1XN CONFIGURATIONTABLE 3-2 CONTROL CODES FOR DUPLEX 1 X N CONFIGURATION Duplex 1 x N Switch ConfigurationFIGURE 3-5 DUPLEX 1 X N SWITCH CONFIGURATION TABLE 3-3 CONTROL CODES FOR 2 X N BLOCKING CONFIGURATION 2 x N Blocking Switch ConfigurationFIGURE 3-6 2 X N BLOCKING SWITCH CONFIGURATION TABLE 3-4 CONTROL CODES FOR 2 X N NON-BLOCKING CONFIGURATION 2 x N Non-Blocking Switch ConfigurationFIGURE 3-7 2 X N NON-BLOCKING SWITCH CONFIGURATION Calculating Switching Time FIGURE 3-8 MULTI-SWITCH TIMINGSM8003 - Prism Switches SM8101 / SM8102 - Optical AttenuatorsStarting the Device Control ModesUncalibrated Operation - Move-To-Absolute-Step Calibrated OperationStep 1 - Power Up and Initialize Step 2 - Query Default ParametersStep 3 - Actuate the Device BUSY SignalREGISTER ACCESS PROGRAMMINGADDRESSING thenTABLE 4-1 SMIP II REGISTER MAP - A16 OFFSETWRITE FUNCTION READ FUNCTIONSMIP II REGISTERS - A16 ID Register - Read OnlyLogical Address Register - Write Only Device Type Register - Read OnlyControl Register - Write Only Offset Register - Read and WriteSerial Number High Register - Read Only Serial Number Low Register - Read OnlyInterrupt Status Register - Read Only Interrupt Control Register - Read and WriteSubclass Register - Read Only ADDRNVM Access Register - Read NVM Access Register - WriteBoard X, Y Used Address Register - Read and Write Trace RAM Start High Register - Read and WriteTrace RAM End High Register - Read and Write Trace RAM End Low Register - Read and WriteTrace RAM Address HIGH Register - Read and Write Trace RAM Address LOW Register - Read and WriteOpen Trigger Select Register - Write Only TTL Trigger Polarity Register - Write OnlyADDR ADDRTrace RAM Control Register - Read and Write Busy Trigger Control Register - Read and WriteADDR ADDRTrigger Advance Register - Write Only Board Busy Register - Read OnlyReserved Registers - Read and Write ADDRFIGURE 4-1 SM8000 SERIES - A24/A32 ADDRESS SPACE VXI Configuration Space1M Memory Allocated to Store Module Settings 1M Memory Allocated for Configuration Relay RegistersSee Typical Optical Multi Switch Operation Control Register - Read and WriteSee Typical Optical Multi Switch Operation See Typical Optical Multi Switch OperationControl Register cont ADDR Delay Register - Read and WriteControl Register cont Status Register - Read Only ADDRCommand Register - Write Only ADDRAddress Register - Write Only ADDRDEVICE MEMORY RELAY REGISTER OFFSETADDR Relay Register 00 - Read and WriteWRITING TO THE RELAY REGISTERS Relay Optical Module’s Data Attenuation Level Register 02 thru 08 - Read and WriteRegister 0A thru 0C - Read Relay Optical Module’s Data Attenuation LevelTYPICAL OPTICAL MULTI-SWITCH CONTROL EXAMPLE PROGRAMMING EXAMPLESRead TYPICAL OPTICAL ATTENUATOR CONTROL EXAMPLEWrite To operate the modules correctly, the SM8000 must be loaded with a valid Address in the Address Register. The SM8000 is hard coded at the factory with the optical modules default address of 73 = 49h, and may be used to generate the address used in the command. This is the address of all attenuators as shipped from the factory. During the programming of the optical module, the programmer may wish to omit sending the module’s address over the VXI Bus, letting the SM8000 generate the default address that is used in the command string. This could possibly increase throughput, by decreasing VXI Bus traffic, if the modules are receiving many commands, although this is only true if the optical module’s address is not changed by the user. If the address is to be changed, IT IS IMPERATIVE THAT THE NEW ADDRESS BE WRITTEN DOWN. Failure to do so will result in an inability to control the module. All four possible modules may have the same address. The SM8000 controls them on separate internal busses COMMAND REGISTER BitsCOMMAND SET TABLE 4-2 ATTENUATOR COMMAND SETConvert decimal step number to hexadecimal Convert to HIGHBYTE and LOWBYTE formatHIGHBYTE and LOWBYTE value to hexadecimal valuePage Multiply dB value by 100 to get integer decimal Convert integer decimal to hexadecimalConvert to HIGHBYTE and LOWBYTE formatConvert hexadecimal value to an integer decimal valueDivide by 100 to convert to dB value HIGHBYTE and LOWBYTE value todecimal value for wavelength nm HIGHBYTE and LOWBYTE value tohexadecimal value Convert hexadecimal value to an integerConvert to calibration temperature Convert the HIGHBYTE to get the monthConvert the MIDBYTE to get the day Convert the LOWBYTE and add 1900 to getConvert the HIGHBYTE into the major revision numberConvert the LOWBYTE into the minor revision Put the major and minor numbers together toMultiply by 100 to convert decimal attenuation value to an integerCovert integer to hexadecimal Concatenate HIGHBYTE and LOWBYTEhard coded at the factory with the optical modules default used in the command. This is the address of all attenuators asthe default address that is used in the command string. This traffic, if the modules are receiving many commands. AlthoughPage VXI Technology, Inc SM8000 Series ProgrammingINDEX VXIbus