2031 Main Street Irvine, CA 949
VXI Technology, Inc
P/N Released February 13
OPTICAL SWITCH USER’S MANUAL
VXI Technology, Inc
SECTION
TABLE OF CONTENTS
SECTION
SECTION
Write Example
Command Set
Uncalibrated Operation - Move-To-Absolute-Step
Read Example
VXI Technology, Inc
SM8000 Series Preface
CERTIFICATION
WARRANTY
LIMITATION OF WARRANTY
RESTRICTED RIGHTS LEGEND
VXI Technology, Inc
Optical Switch
D E C L A R A T I O N O F C O N F O R M I T Y
2031 Main Street
VXI Technology, Inc
SM8000 Series Preface
Use Proper Power Cord
GENERAL SAFETY INSTRUCTIONS
TERMS AND SYMBOLS
Use Proper Power Source
Ground the Product
WARNINGS CONT
Avoid Electric Shock
Operating Conditions
VXI Technology Cleveland Instrument Division
SUPPORT RESOURCES
VXI Technology World Headquarters
VXI Technology Lake Stevens Instrument Division
VXI Technology, Inc
SM8000 Series Preface
SECTION
INTRODUCTION
OVERVIEW
SM8000 SERIES - OPTICAL SWITCH CONTROLLER
SM8001 / SM8002 - MULTI-CHANNEL SWITCHES
Configurations
Duplex 1 x N
FIGURE 1-2 SM8001 / 8002 SWITCHES
1 x N
2 x N Blocking
780 - 1650 nm
SM8001 / SM8002 MULTI SWITCH SPECIFICATIONS
1 All specifications referenced without connectors
0.6 dB typical, 1.2 dB maximum
SPDT
SM8003 - PRISM SWITCHES
SPST
Transfer - Position
780 - 1570 nm
SM8003 PRISM SWITCH SPECIFICATIONS
2 Repeatability for 100 cycles at constant temperature
0.6 dB typical, 1.1 dB maximum
SM8101 / SM8102 - OPTICAL ATTENUATORS
SM8101 / SM8102 SPECIFICATIONS
Resolution
0 - 10 dB
PREPARATION FOR USE
CALCULATING SYSTEM POWER AND COOLING REQUIREMENTS
SETTING THE CHASSIS BACKPLANE JUMPERS
INTRODUCTION
BACK
SETTING THE LOGICAL ADDRESS
switch to 1 and the front switch to
FRONT
Convert to MSB and LSB
switch to C and the front switch to
Divide by
SELECTING THE EXTENDED MEMORY SPACE
Cleaning Optical Connectors
Service should only be performed by qualified personnel
OPTICAL CONNECTIONS
Mating Optical Connectors
OPERATION
GENERAL DESCRIPTION
SECTION
SPST
SM8003 - Prism Switches
FIGURE 3-2 SM8003 PRISM SWITCHES
SPDT
FIGURE 3-3 ATTENUATOR DIAGRAM
SM8101 / SM8102 - Optical Attenuators
Resetting the Switch
OPERATION
SM8001 / SM8002 - Multi-Channel Switches
Relay Registers - Output Channel Selection
FIGURE 3-4 1 X N SWITCH CONFIGURATION
1 x N Switch Configuration
RESET
TABLE 3-1 CONTROL CODES FOR 1XN CONFIGURATION
Duplex 1 x N Switch Configuration
FIGURE 3-5 DUPLEX 1 X N SWITCH CONFIGURATION
TABLE 3-2 CONTROL CODES FOR DUPLEX 1 X N CONFIGURATION
2 x N Blocking Switch Configuration
FIGURE 3-6 2 X N BLOCKING SWITCH CONFIGURATION
TABLE 3-3 CONTROL CODES FOR 2 X N BLOCKING CONFIGURATION
2 x N Non-Blocking Switch Configuration
FIGURE 3-7 2 X N NON-BLOCKING SWITCH CONFIGURATION
TABLE 3-4 CONTROL CODES FOR 2 X N NON-BLOCKING CONFIGURATION
Calculating Switching Time
FIGURE 3-8 MULTI-SWITCH TIMING
SM8003 - Prism Switches
SM8101 / SM8102 - Optical Attenuators
Uncalibrated Operation - Move-To-Absolute-Step
Starting the Device
Control Modes
Calibrated Operation
Step 3 - Actuate the Device
Step 1 - Power Up and Initialize
Step 2 - Query Default Parameters
BUSY Signal
ADDRESSING
REGISTER ACCESS
PROGRAMMING
then
WRITE FUNCTION
TABLE 4-1 SMIP II REGISTER MAP - A16
OFFSET
READ FUNCTION
Logical Address Register - Write Only
SMIP II REGISTERS - A16
ID Register - Read Only
Device Type Register - Read Only
Serial Number High Register - Read Only
Control Register - Write Only
Offset Register - Read and Write
Serial Number Low Register - Read Only
Subclass Register - Read Only
Interrupt Status Register - Read Only
Interrupt Control Register - Read and Write
ADDR
Board X, Y Used Address Register - Read and Write
NVM Access Register - Read
NVM Access Register - Write
Trace RAM Start High Register - Read and Write
Trace RAM Address HIGH Register - Read and Write
Trace RAM End High Register - Read and Write
Trace RAM End Low Register - Read and Write
Trace RAM Address LOW Register - Read and Write
ADDR
Open Trigger Select Register - Write Only
TTL Trigger Polarity Register - Write Only
ADDR
ADDR
Trace RAM Control Register - Read and Write
Busy Trigger Control Register - Read and Write
ADDR
Reserved Registers - Read and Write
Trigger Advance Register - Write Only
Board Busy Register - Read Only
ADDR
1M Memory Allocated to Store Module Settings 1M Memory Allocated
FIGURE 4-1 SM8000 SERIES - A24/A32 ADDRESS SPACE
VXI Configuration Space
for Configuration Relay Registers
See Typical Optical Multi Switch Operation
See Typical Optical Multi Switch Operation
Control Register - Read and Write
See Typical Optical Multi Switch Operation
Control Register cont
Delay Register - Read and Write
Control Register cont
ADDR
Status Register - Read Only
ADDR
Command Register - Write Only
ADDR
Address Register - Write Only
ADDR
DEVICE MEMORY
RELAY REGISTER OFFSET
Relay Register 00 - Read and Write
WRITING TO THE RELAY REGISTERS
ADDR
Register 0A thru 0C - Read
Relay Optical Module’s Data Attenuation Level
Register 02 thru 08 - Read and Write
Relay Optical Module’s Data Attenuation Level
TYPICAL OPTICAL MULTI-SWITCH CONTROL EXAMPLE
PROGRAMMING EXAMPLES
TYPICAL OPTICAL ATTENUATOR CONTROL EXAMPLE
Write
Read
To operate the modules correctly, the SM8000 must be loaded with a valid Address in the Address Register. The SM8000 is hard coded at the factory with the optical modules default address of 73 = 49h, and may be used to generate the address used in the command. This is the address of all attenuators as shipped from the factory. During the programming of the optical module, the programmer may wish to omit sending the module’s address over the VXI Bus, letting the SM8000 generate the default address that is used in the command string. This could possibly increase throughput, by decreasing VXI Bus traffic, if the modules are receiving many commands, although this is only true if the optical module’s address is not changed by the user. If the address is to be changed, IT IS IMPERATIVE THAT THE NEW ADDRESS BE WRITTEN DOWN. Failure to do so will result in an inability to control the module. All four possible modules may have the same address. The SM8000 controls them on separate internal busses
COMMAND REGISTER
Bits
COMMAND SET
TABLE 4-2 ATTENUATOR COMMAND SET
HIGHBYTE and LOWBYTE value to
Convert decimal step number to hexadecimal
Convert to HIGHBYTE and LOWBYTE format
hexadecimal value
Page
Convert to HIGHBYTE and LOWBYTE
Multiply dB value by 100 to get integer decimal
Convert integer decimal to hexadecimal
format
Divide by 100 to convert to dB value
Convert hexadecimal value to an integer
decimal value
HIGHBYTE and LOWBYTE value to
hexadecimal value
decimal value for wavelength nm
HIGHBYTE and LOWBYTE value to
Convert hexadecimal value to an integer
Convert the MIDBYTE to get the day
Convert to calibration temperature
Convert the HIGHBYTE to get the month
Convert the LOWBYTE and add 1900 to get
Convert the LOWBYTE into the minor revision
Convert the HIGHBYTE into the major revision
number
Put the major and minor numbers together to
Covert integer to hexadecimal
Multiply by 100 to convert decimal attenuation
value to an integer
Concatenate HIGHBYTE and LOWBYTE
the default address that is used in the command string. This
hard coded at the factory with the optical modules default
used in the command. This is the address of all attenuators as
traffic, if the modules are receiving many commands. Although
Page
VXI Technology, Inc
SM8000 Series Programming
INDEX
VXIbus