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VXI SM8000 SMIP II REGISTERS - A16, ID Register - Read Only, Device Type Register - Read Only

Models: SM8000

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SMIP II REGISTERS - A16

VXI Technology, Inc.

SMIP II REGISTERS - A16

The following describes the registers shown in the SMIP II Register Map for A16 address space.

			ID Register – Read Only
	ADDR	Plug-In LA+0x00
	D11-D0	Manufacturer's ID	VXI Technology, Inc., set to F4B16
	D13-D12	Address Space	A16/A24 = 002
	D13-D12	Address Space	A16/A32 = 012
			A16/A32 = 012
	D15-D14	Device Class	Extended register based device, set to 012

		Logical Address Register – Write Only
	ADDR	Plug-In LA+0x00
			Sets the new logical address in a dynamically configured module.
	D7-D0	Logical Address	When set for dynamic configuration (set to FF16) a soft reset will
	D7-D0	Logical Address	not alter the configured logical address, while a hard reset will set

			the register back to FF16.
	D15-D8	Reserved	Writing to this range has no effect.

Device Type Register – Read Only

	ADDR	Plug-In LA+0x02
	D11-D0	Model Code	Model 277, set to 11516
	D15-D12	Required Memory	2	Mbytes, set to 216, for A24
	D15-D12	Required Memory	2	Mbytes, set to A16, for A32
			2	Mbytes, set to A16, for A32

Status Register – Read Only

	ADDR	Plug-In LA+0x04
	D15	A24/A32 Active	1	= indicates that A24/A32 memory space access is enabled
	D15	A24/A32 Active	0	= indicates that A24/A32 memory space access is locked out
			0	= indicates that A24/A32 memory space access is locked out
	D14	MODID*	1	= indicates that the module is not selected by the MODID line
	D14	MODID*	0	= indicates that the module is selected by the MODID line
			0	= indicates that the module is selected by the MODID line
	D13-D4	Reserved	These bits always read as 11,1111,11112
	D3	Ready	This bit always reads as 12
	D2	Passed	This bit always reads as 12
	D1-D0	Reserved	These bits always read as 112

SM8000 Series Programming

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VXI SM8000 user manual SMIP II REGISTERS - A16, ID Register - Read Only, Logical Address Register - Write Only

Contents

OPTICAL SWITCH USER’S MANUAL VXI Technology, IncP/N Released February 13 2031 Main Street Irvine, CA 949VXI Technology, Inc SECTION TABLE OF CONTENTSSECTION SECTIONRead Example Command SetUncalibrated Operation - Move-To-Absolute-Step Write ExampleSM8000 Series Preface VXI Technology, IncRESTRICTED RIGHTS LEGEND WARRANTYLIMITATION OF WARRANTY CERTIFICATION2031 Main Street Optical SwitchD E C L A R A T I O N O F C O N F O R M I T Y VXI Technology, IncSM8000 Series Preface VXI Technology, IncUse Proper Power Source GENERAL SAFETY INSTRUCTIONSTERMS AND SYMBOLS Use Proper Power CordOperating Conditions WARNINGS CONTAvoid Electric Shock Ground the ProductVXI Technology Lake Stevens Instrument Division SUPPORT RESOURCESVXI Technology World Headquarters VXI Technology Cleveland Instrument DivisionSM8000 Series Preface VXI Technology, IncSECTION INTRODUCTIONOVERVIEW SM8000 SERIES - OPTICAL SWITCH CONTROLLER Configurations SM8001 / SM8002 - MULTI-CHANNEL SWITCHES2 x N Blocking FIGURE 1-2 SM8001 / 8002 SWITCHES1 x N Duplex 1 x N0.6 dB typical, 1.2 dB maximum SM8001 / SM8002 MULTI SWITCH SPECIFICATIONS1 All specifications referenced without connectors 780 - 1650 nmTransfer - Position SM8003 - PRISM SWITCHESSPST SPDT0.6 dB typical, 1.1 dB maximum SM8003 PRISM SWITCH SPECIFICATIONS2 Repeatability for 100 cycles at constant temperature 780 - 1570 nm0 - 10 dB SM8101 / SM8102 SPECIFICATIONSResolution SM8101 / SM8102 - OPTICAL ATTENUATORSINTRODUCTION CALCULATING SYSTEM POWER AND COOLING REQUIREMENTSSETTING THE CHASSIS BACKPLANE JUMPERS PREPARATION FOR USEFRONT SETTING THE LOGICAL ADDRESSswitch to 1 and the front switch to BACKSELECTING THE EXTENDED MEMORY SPACE switch to C and the front switch toDivide by Convert to MSB and LSBMating Optical Connectors Service should only be performed by qualified personnelOPTICAL CONNECTIONS Cleaning Optical ConnectorsOPERATION GENERAL DESCRIPTIONSECTION SPDT SM8003 - Prism SwitchesFIGURE 3-2 SM8003 PRISM SWITCHES SPSTSM8101 / SM8102 - Optical Attenuators FIGURE 3-3 ATTENUATOR DIAGRAMRelay Registers - Output Channel Selection OPERATIONSM8001 / SM8002 - Multi-Channel Switches Resetting the SwitchTABLE 3-1 CONTROL CODES FOR 1XN CONFIGURATION 1 x N Switch ConfigurationRESET FIGURE 3-4 1 X N SWITCH CONFIGURATIONDuplex 1 x N Switch Configuration FIGURE 3-5 DUPLEX 1 X N SWITCH CONFIGURATIONTABLE 3-2 CONTROL CODES FOR DUPLEX 1 X N CONFIGURATION 2 x N Blocking Switch Configuration FIGURE 3-6 2 X N BLOCKING SWITCH CONFIGURATIONTABLE 3-3 CONTROL CODES FOR 2 X N BLOCKING CONFIGURATION 2 x N Non-Blocking Switch Configuration FIGURE 3-7 2 X N NON-BLOCKING SWITCH CONFIGURATIONTABLE 3-4 CONTROL CODES FOR 2 X N NON-BLOCKING CONFIGURATION FIGURE 3-8 MULTI-SWITCH TIMING Calculating Switching TimeSM8101 / SM8102 - Optical Attenuators SM8003 - Prism SwitchesCalibrated Operation Starting the DeviceControl Modes Uncalibrated Operation - Move-To-Absolute-StepBUSY Signal Step 1 - Power Up and InitializeStep 2 - Query Default Parameters Step 3 - Actuate the Devicethen REGISTER ACCESSPROGRAMMING ADDRESSINGREAD FUNCTION TABLE 4-1 SMIP II REGISTER MAP - A16OFFSET WRITE FUNCTIONDevice Type Register - Read Only SMIP II REGISTERS - A16ID Register - Read Only Logical Address Register - Write OnlySerial Number Low Register - Read Only Control Register - Write OnlyOffset Register - Read and Write Serial Number High Register - Read OnlyADDR Interrupt Status Register - Read OnlyInterrupt Control Register - Read and Write Subclass Register - Read OnlyTrace RAM Start High Register - Read and Write NVM Access Register - ReadNVM Access Register - Write Board X, Y Used Address Register - Read and WriteTrace RAM Address LOW Register - Read and Write Trace RAM End High Register - Read and WriteTrace RAM End Low Register - Read and Write Trace RAM Address HIGH Register - Read and WriteADDR Open Trigger Select Register - Write OnlyTTL Trigger Polarity Register - Write Only ADDRADDR Trace RAM Control Register - Read and WriteBusy Trigger Control Register - Read and Write ADDRADDR Trigger Advance Register - Write OnlyBoard Busy Register - Read Only Reserved Registers - Read and Writefor Configuration Relay Registers FIGURE 4-1 SM8000 SERIES - A24/A32 ADDRESS SPACEVXI Configuration Space 1M Memory Allocated to Store Module Settings 1M Memory AllocatedSee Typical Optical Multi Switch Operation See Typical Optical Multi Switch OperationControl Register - Read and Write See Typical Optical Multi Switch OperationControl Register cont Delay Register - Read and Write Control Register contADDR ADDR Status Register - Read OnlyADDR Command Register - Write OnlyADDR Address Register - Write OnlyRELAY REGISTER OFFSET DEVICE MEMORYRelay Register 00 - Read and Write WRITING TO THE RELAY REGISTERSADDR Relay Optical Module’s Data Attenuation Level Relay Optical Module’s Data Attenuation LevelRegister 02 thru 08 - Read and Write Register 0A thru 0C - ReadPROGRAMMING EXAMPLES TYPICAL OPTICAL MULTI-SWITCH CONTROL EXAMPLETYPICAL OPTICAL ATTENUATOR CONTROL EXAMPLE WriteRead To operate the modules correctly, the SM8000 must be loaded with a valid Address in the Address Register. The SM8000 is hard coded at the factory with the optical modules default address of 73 = 49h, and may be used to generate the address used in the command. This is the address of all attenuators as shipped from the factory. During the programming of the optical module, the programmer may wish to omit sending the module’s address over the VXI Bus, letting the SM8000 generate the default address that is used in the command string. This could possibly increase throughput, by decreasing VXI Bus traffic, if the modules are receiving many commands, although this is only true if the optical module’s address is not changed by the user. If the address is to be changed, IT IS IMPERATIVE THAT THE NEW ADDRESS BE WRITTEN DOWN. Failure to do so will result in an inability to control the module. All four possible modules may have the same address. The SM8000 controls them on separate internal busses Bits COMMAND REGISTERTABLE 4-2 ATTENUATOR COMMAND SET COMMAND SEThexadecimal value Convert decimal step number to hexadecimalConvert to HIGHBYTE and LOWBYTE format HIGHBYTE and LOWBYTE value toPage format Multiply dB value by 100 to get integer decimalConvert integer decimal to hexadecimal Convert to HIGHBYTE and LOWBYTEHIGHBYTE and LOWBYTE value to Convert hexadecimal value to an integerdecimal value Divide by 100 to convert to dB valueConvert hexadecimal value to an integer decimal value for wavelength nmHIGHBYTE and LOWBYTE value to hexadecimal valueConvert the LOWBYTE and add 1900 to get Convert to calibration temperatureConvert the HIGHBYTE to get the month Convert the MIDBYTE to get the dayPut the major and minor numbers together to Convert the HIGHBYTE into the major revisionnumber Convert the LOWBYTE into the minor revisionConcatenate HIGHBYTE and LOWBYTE Multiply by 100 to convert decimal attenuationvalue to an integer Covert integer to hexadecimaltraffic, if the modules are receiving many commands. Although hard coded at the factory with the optical modules defaultused in the command. This is the address of all attenuators as the default address that is used in the command string. ThisPage SM8000 Series Programming VXI Technology, IncINDEX VXIbus