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VXI SM8000 Trigger Advance Register - Write Only, Board Busy Register - Read Only, Addr

Models: SM8000

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Trigger Advance Register – Write Only

VXI Technology, Inc.

Trigger Advance Register – Write Only

ADDR	Plug-In LA+0x3E
		The act of writing to this location causes a Trace Advance event to
D15-D0	Unused	occur in the module. The specific data written to these bits has no
		affect.

			Board Busy Register – Read Only
	ADDR	Plug-In LA+0x3E
	D15-D7	Unused		These bits always read back as 1s.
				Indicates whether the SMIP platform is a single or double-slot.
	D6			0 = single-slot
				1 = double-slot
				A 0 read from this bit indicates the relays on module 5 have
	D5			settled. A 1 indicates that the relays on module 5 are still changing
				state.
	D4			A 0 read from this bit indicates the relays on module 4 have settle.
	D4			A 1 indicates that the relays on module 4 are still changing state.

				A 0 read from this bit indicates the relays on module 3 have
	D3			settled. A 1 indicates that the relays on module 3 are still changing
				state.
				A 0 read from this bit indicates the relays on module 2 have
	D2			settled. A 1 indicates that the relays on module 2 are still changing
				state.
				A 0 read from this bit indicates the relays on module 1 have
	D1			settled. A 1 indicates that the relays on module 1 are still changing
				state.
				A 0 read from this bit indicates the relays on module 0 have
	D0			settled. A 1 indicates that the relays on module 0 are still changing
				state.

Reserved Registers – Read and Write

	ADDR	N/A
	D15-D0	Unused	Writing to these registers has no effect and will always read back
	D15-D0	Unused	as FFFF16.
			as FFFF16.

46	SM8000 Series Programming

Image 46

VXI SM8000 Trigger Advance Register - Write Only, Board Busy Register - Read Only, Reserved Registers - Read and Write

Contents

2031 Main Street Irvine, CA 949 VXI Technology, IncP/N Released February 13 OPTICAL SWITCH USER’S MANUALVXI Technology, Inc SECTION TABLE OF CONTENTSSECTION SECTIONWrite Example Command SetUncalibrated Operation - Move-To-Absolute-Step Read ExampleVXI Technology, Inc SM8000 Series PrefaceCERTIFICATION WARRANTYLIMITATION OF WARRANTY RESTRICTED RIGHTS LEGENDVXI Technology, Inc Optical SwitchD E C L A R A T I O N O F C O N F O R M I T Y 2031 Main StreetVXI Technology, Inc SM8000 Series PrefaceUse Proper Power Cord GENERAL SAFETY INSTRUCTIONSTERMS AND SYMBOLS Use Proper Power SourceGround the Product WARNINGS CONTAvoid Electric Shock Operating ConditionsVXI Technology Cleveland Instrument Division SUPPORT RESOURCESVXI Technology World Headquarters VXI Technology Lake Stevens Instrument DivisionVXI Technology, Inc SM8000 Series PrefaceINTRODUCTION SECTIONOVERVIEW SM8000 SERIES - OPTICAL SWITCH CONTROLLER SM8001 / SM8002 - MULTI-CHANNEL SWITCHES ConfigurationsDuplex 1 x N FIGURE 1-2 SM8001 / 8002 SWITCHES1 x N 2 x N Blocking780 - 1650 nm SM8001 / SM8002 MULTI SWITCH SPECIFICATIONS1 All specifications referenced without connectors 0.6 dB typical, 1.2 dB maximumSPDT SM8003 - PRISM SWITCHESSPST Transfer - Position780 - 1570 nm SM8003 PRISM SWITCH SPECIFICATIONS2 Repeatability for 100 cycles at constant temperature 0.6 dB typical, 1.1 dB maximumSM8101 / SM8102 - OPTICAL ATTENUATORS SM8101 / SM8102 SPECIFICATIONSResolution 0 - 10 dBPREPARATION FOR USE CALCULATING SYSTEM POWER AND COOLING REQUIREMENTSSETTING THE CHASSIS BACKPLANE JUMPERS INTRODUCTIONBACK SETTING THE LOGICAL ADDRESSswitch to 1 and the front switch to FRONTConvert to MSB and LSB switch to C and the front switch toDivide by SELECTING THE EXTENDED MEMORY SPACECleaning Optical Connectors Service should only be performed by qualified personnelOPTICAL CONNECTIONS Mating Optical ConnectorsGENERAL DESCRIPTION OPERATIONSECTION SPST SM8003 - Prism SwitchesFIGURE 3-2 SM8003 PRISM SWITCHES SPDTFIGURE 3-3 ATTENUATOR DIAGRAM SM8101 / SM8102 - Optical AttenuatorsResetting the Switch OPERATIONSM8001 / SM8002 - Multi-Channel Switches Relay Registers - Output Channel SelectionFIGURE 3-4 1 X N SWITCH CONFIGURATION 1 x N Switch ConfigurationRESET TABLE 3-1 CONTROL CODES FOR 1XN CONFIGURATIONFIGURE 3-5 DUPLEX 1 X N SWITCH CONFIGURATION Duplex 1 x N Switch ConfigurationTABLE 3-2 CONTROL CODES FOR DUPLEX 1 X N CONFIGURATION FIGURE 3-6 2 X N BLOCKING SWITCH CONFIGURATION 2 x N Blocking Switch ConfigurationTABLE 3-3 CONTROL CODES FOR 2 X N BLOCKING CONFIGURATION FIGURE 3-7 2 X N NON-BLOCKING SWITCH CONFIGURATION 2 x N Non-Blocking Switch ConfigurationTABLE 3-4 CONTROL CODES FOR 2 X N NON-BLOCKING CONFIGURATION Calculating Switching Time FIGURE 3-8 MULTI-SWITCH TIMINGSM8003 - Prism Switches SM8101 / SM8102 - Optical AttenuatorsUncalibrated Operation - Move-To-Absolute-Step Starting the DeviceControl Modes Calibrated OperationStep 3 - Actuate the Device Step 1 - Power Up and InitializeStep 2 - Query Default Parameters BUSY SignalADDRESSING REGISTER ACCESSPROGRAMMING thenWRITE FUNCTION TABLE 4-1 SMIP II REGISTER MAP - A16OFFSET READ FUNCTIONLogical Address Register - Write Only SMIP II REGISTERS - A16ID Register - Read Only Device Type Register - Read OnlySerial Number High Register - Read Only Control Register - Write OnlyOffset Register - Read and Write Serial Number Low Register - Read OnlySubclass Register - Read Only Interrupt Status Register - Read OnlyInterrupt Control Register - Read and Write ADDRBoard X, Y Used Address Register - Read and Write NVM Access Register - ReadNVM Access Register - Write Trace RAM Start High Register - Read and WriteTrace RAM Address HIGH Register - Read and Write Trace RAM End High Register - Read and WriteTrace RAM End Low Register - Read and Write Trace RAM Address LOW Register - Read and WriteADDR Open Trigger Select Register - Write OnlyTTL Trigger Polarity Register - Write Only ADDRADDR Trace RAM Control Register - Read and WriteBusy Trigger Control Register - Read and Write ADDRReserved Registers - Read and Write Trigger Advance Register - Write OnlyBoard Busy Register - Read Only ADDR1M Memory Allocated to Store Module Settings 1M Memory Allocated FIGURE 4-1 SM8000 SERIES - A24/A32 ADDRESS SPACEVXI Configuration Space for Configuration Relay RegistersSee Typical Optical Multi Switch Operation See Typical Optical Multi Switch OperationControl Register - Read and Write See Typical Optical Multi Switch OperationControl Register cont Control Register cont Delay Register - Read and WriteADDR Status Register - Read Only ADDRCommand Register - Write Only ADDRAddress Register - Write Only ADDRDEVICE MEMORY RELAY REGISTER OFFSETWRITING TO THE RELAY REGISTERS Relay Register 00 - Read and WriteADDR Register 0A thru 0C - Read Relay Optical Module’s Data Attenuation LevelRegister 02 thru 08 - Read and Write Relay Optical Module’s Data Attenuation LevelTYPICAL OPTICAL MULTI-SWITCH CONTROL EXAMPLE PROGRAMMING EXAMPLESWrite TYPICAL OPTICAL ATTENUATOR CONTROL EXAMPLERead To operate the modules correctly, the SM8000 must be loaded with a valid Address in the Address Register. The SM8000 is hard coded at the factory with the optical modules default address of 73 = 49h, and may be used to generate the address used in the command. This is the address of all attenuators as shipped from the factory. During the programming of the optical module, the programmer may wish to omit sending the module’s address over the VXI Bus, letting the SM8000 generate the default address that is used in the command string. This could possibly increase throughput, by decreasing VXI Bus traffic, if the modules are receiving many commands, although this is only true if the optical module’s address is not changed by the user. If the address is to be changed, IT IS IMPERATIVE THAT THE NEW ADDRESS BE WRITTEN DOWN. Failure to do so will result in an inability to control the module. All four possible modules may have the same address. The SM8000 controls them on separate internal busses COMMAND REGISTER BitsCOMMAND SET TABLE 4-2 ATTENUATOR COMMAND SETHIGHBYTE and LOWBYTE value to Convert decimal step number to hexadecimalConvert to HIGHBYTE and LOWBYTE format hexadecimal valuePage Convert to HIGHBYTE and LOWBYTE Multiply dB value by 100 to get integer decimalConvert integer decimal to hexadecimal formatDivide by 100 to convert to dB value Convert hexadecimal value to an integerdecimal value HIGHBYTE and LOWBYTE value tohexadecimal value decimal value for wavelength nmHIGHBYTE and LOWBYTE value to Convert hexadecimal value to an integerConvert the MIDBYTE to get the day Convert to calibration temperatureConvert the HIGHBYTE to get the month Convert the LOWBYTE and add 1900 to getConvert the LOWBYTE into the minor revision Convert the HIGHBYTE into the major revisionnumber Put the major and minor numbers together toCovert integer to hexadecimal Multiply by 100 to convert decimal attenuationvalue to an integer Concatenate HIGHBYTE and LOWBYTEthe default address that is used in the command string. This hard coded at the factory with the optical modules defaultused in the command. This is the address of all attenuators as traffic, if the modules are receiving many commands. AlthoughPage VXI Technology, Inc SM8000 Series ProgrammingINDEX VXIbus