LogiCORE IP can, UG186 April 19 | Xilinx 3.2 instruction

LogiCORE™ IP CAN v3.2

Getting Started Guide

UG186 April 19, 2010

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Xilinx 3.2 manual LogiCORE IP can, UG186 April 19

Contents

UG186 April 19 LogiCORE IP can Version Revision Revision History Table of Contents Detailed Example Design 1Example Design Schedule of Figures Can Getting Started Guide About This Guide Guide ContentsConventions Preface About This Guide Convention Meaning or Use Example Online Document About the Core System Requirements IntroductionWindows Linux Additional Core Resources Recommended Design ExperienceTechnical Support Feedback Before you Begin Licensing the CoreLicense Options Simulation Only Obtaining Your License Key Installing Your License File Overview Quick Start Example Design Quick Start Example Design Generating the Core Implementing the Example Design Setting up for SimulationSimulating the Example Design Implementing the Example Design Timing Simulation Functional Simulation Detailed Example Design Directory and File Contents Componentnameexample design Directory and File ContentsComponentname/doc Name Description Componentname/implement/results Componentname/implementComponentname/simulation 5Implement Directory Name Description Componentname/simulation/functional Simulation/timing Simulation Scripts Implementation ScriptsImplementation Scripts 1illustrates the example design configuration Example Design Configuration Test Bench Functionality Demonstration Test BenchDemonstration Test Bench Core with Acceptance Filtering Changing the Data Customizing the Demonstration Test Bench Detailed Example Design