Chapter 4: Detailed Example Design
<component_name>/implement
The implement directory contains the core implementation script files. Generated for Full- System Hardware Evaluation and Full license types.
Table 4-5: Implement Directory
Name | Description |
|
|
<project_dir>/<component_name>/implement | |
|
|
implement.{batsh} | A Windows (.bat) or Linux script that |
| processes the example design. |
|
|
xst.prj | The XST project file for the example design |
| that lists all of the source files to be |
| synthesized. Only available when the CORE |
| Generator software project option is set to |
| ISE® or Other. |
|
|
xst.scr | The XST script file for the example design |
| used to synthesize the core. Only available |
| when the CORE Generator software Vendor |
| project option is set to ISE or Other. |
|
|
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|
<component_name>/implement/results
The results directory is created by the implement script, after which the implement script results are placed in the results directory.
Table 4-6: Results Directory
Name | Description |
|
|
<project_dir>/<component_name>/implement/results
Implement script result files.
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<component_name>/simulation
The simulation directory contains the simulation scripts provided with the core.
Table
Name | Description |
|
|
<project_dir>/<component_name>/simulation | |
|
|
glbl.v | Verilog test file provided with the |
| demonstration test bench. |
|
|
can_v3_2_tb.v[hd] | Verilog/VHDL test file provided with the |
| demonstration test bench. |
|
|
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|
20 | www.xilinx.com | CAN Getting Started Guide |
|
| UG186 April 19, 2010 |
