Intel SE7221BK1-E IDE configuration sub-menu, Bios Setup IDE Configuration Menu Options, Enabled

Page 50

SE7221BK1-ETechnical Product Specification

Feature

Options

Help Text

Description

Hyper-Threading

Enabled

"ENABLE: Enable CPU

Controls Hyper-Threading state.

Technology

Disabled

Hyperthreading for HT enabled

Primarily used to support older

 

processor(s).

 

Operating Systems that do not

 

 

 

 

 

 

 

support Hyper Threading.

 

 

DISABLE: Disable CPU

 

 

 

Hyperthreading for HT enabled

 

 

 

processor(s)."

Controls

 

 

 

Hyperthreading state. Primarily used

 

 

 

to support older Operating Systems

 

 

 

that do not support Hyperthreading.

 

 

 

 

 

 

9.5.2.2IDE configuration sub-menu

Table 43. BIOS Setup IDE Configuration Menu Options

Feature

Options

Help Text

Description

ATA/IDE

Disabled

Disable:SATA and PATA

Controls state of integrated S-

configuration

Compatible

controller will be disabled

ATA and P-ATAcontroller.

 

Enhanced

 

 

 

 

 

 

Legancy IDE Channel

SATA Only

SATA Only:SATA controller

This option will be hided when

 

PATA Pri,SATA,Sec

enabled only.

ATA/IDE configuration Disabled

 

SATA Pri,PATA,Sec

PATA Pri,SATA Sec:PATA

In compatible mode this item will

 

PATA Only

controller is primary ,SATA is

be used.

 

secondary

 

 

 

 

 

 

SATA Pri,PATA Sec: SATA

 

 

 

controller is primary ,PATA is

 

 

 

secondary

 

 

 

PATA Only:PATA controller

 

 

 

enabled only.

 

 

 

 

 

Configure S-ATA as

IDE

 

In Enhance mode this item will be

 

RAID

 

showed

 

AHCI

 

 

Stagger Spinup

Disabled

 

This item showed when Configure

support

Enabled

 

S-ATA as RAID/AHCI

 

 

 

 

 

 

 

Primary IDE Master

N/A

While entering setup, BIOS auto

Selects submenu with additional

 

 

detects the presence of IDE

device details.

 

 

devices. This displays the

 

 

 

status of auto detection of IDE

 

 

 

devices.

 

 

 

 

 

Primary IDE Slave

N/A

While entering setup, BIOS auto

Selects submenu with additional

 

 

detects the presence of IDE

device details.

 

 

devices. This displays the

 

 

 

status of auto detection of IDE

 

 

 

devices.

 

 

 

 

 

Secondary IDE

N/A

While entering setup, BIOS auto

Selects submenu with additional

Master

 

detects the presence of IDE

device details.

 

 

devices. This displays the

 

 

 

status of auto detection of IDE

 

 

 

devices.

 

38

Revision 1.3

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Page 49 Page 51
Contents Intel Server Board SE7221BK1-E Date Revision Modifications Number SE7221BK1-ETechnical Product SpecificationRevision SE7221BK1-E Technical Product Specification DisclaimersTable of contents Bios Setup Utility ConnectorsConfiguration Jumpers Acpi ImplementationAbsolute Maximum Ratings SE7221BK1 -E Technical Product SpecificationBoot Block Post Progress Codes Power Information Hardware MonitoringIndustry Canada ICES-003 GlossaryList of Tables ViiiSE7221BK1-E Technical Product Specification Revision List of Figures Page Introduction SE7221BK1-E Feature Set Server Board Overviewƒ USB ƒ LPC Low Pin Count bus segment with one embedded devicesCPU PCI-X 100 SlotFunctional Architecture Processor SubsystemMemory Dimm Support Memory SubsystemInterrupts and Apic Processor Support MatrixMemory Configuration Location Dimm Label Channel Population Order Memory Bank Label DefinitionThroughput Level Configuration Characteristics Intel E7221 ChipsetGraphics Memory Controller Hub Gmch 1.1 DDR2 ConfigurationsGmch Memory Architecture Overview Supported DDR2 modules3 ICH6R PCI Bus P32-A I/O SubsystemPCI Bus Master IDE Interface Power ManagementPCI Express* X4 Subsystem USB InterfaceSuper I/O Serial PortsPCI Subsystem Bios FlashO Subsystem System Health Support2.2 P32-B Arbitration 2 P32-B 66-MHz PCI-X Subsystem SE7221BK1LX sku only1.2 P32-A Arbitration 3.2 P64-C Arbitration P64-C Configuration IDs3 P64-C 66/100-MHz PCI-X Subsystem P32-B Arbitration ConnectionsNetwork Interface Controller NIC NIC Connector and Status LEDsVideo Controller PCI-EApic Interrupt Routing Interrupt RoutingLegacy Interrupt Routing Legacy Interrupt SourcesISA Interrupt Description PCI Error HandlingSerialized IRQ Support Gmch Intr CPU ICH6ICH6 Ioapic DMI Interface Super I/O PCI InterfacePA IRQ8 Interface PB IRQ8 InterfaceAcpi Front Panel SwitchesAcpi Implementation Supported Wake Events Power Button On to Off Legacy Power Button On to Off AcpiWake up Sources Acpi and Legacy USBPower Connector Pin-out CN4H1 ConnectorsMain Power Connector Auxiliary CPU Power Connector Pin-out CN4B1Hsbp Header Pin-out J1D1 Front Panel ConnectorI2C Header LCD Header Pin-out J1C1VGA Connector Pin-out J8A1 VGA ConnectorNIC Connector NIC1-82541PI10/100/1000 Connector Pin-out J5A1ATA 40-pin Connector Pin-out J3J1 IDE ConnectorNIC2-82541PI 10/100/1000 Connector Pin-out J6A1 IDEA1 Diag IDEA0 IDEA2 IDEDCS0# IDEDCS1# IDEHDACT# GNDSata Connector Pin-out J1G1, J1G2, J1J2, J2J1 Sata ConnectorUSB Connector USB Connectors Pin-out J5A1Legacy 34-pin Floppy Connector Pin-out JP3J1 Floppy ConnectorSerial Port Connector External DB9 Serial a Port Pin-out J8A1Miscellaneous Headers Keyboard and Mouse ConnectorKeyboard and Mouse PS/2 Connectors Pin-out KM9A1 Fan HeaderHDD LED Header J1E1 Pin-Out Pin Signal Name Intrusion Cable ConnectorIntrusion Cable Connector J1A1Pin-Out Pin Signal Name HDD LED HeaderRolling Bios selection header Configuration JumpersSystem Recovery and Update Jumpers System Recovery and Update Jumper OptionsKeyboard Commands Bios Setup UtilityConfiguration Reset LocalizationESC Load Setup Defaults?Cancel PostSave configuration changes and exit setup? Entering Bios SetupBios Setup, Main Menu Options Feature Options Help Text DescriptionBios Setup, Processor configuration sub-menu options Processor configuration sub-menuBios Setup, Advanced Menu Options Advanced menuEnabled IDE configuration sub-menuBios Setup IDE Configuration Menu Options CompatibleAuto Bios Setup, IDE Device Configuration Sub-menu SelectionsHost & Device Cdrom ArmdBios Setup, Floppy Configuration Sub-menu Selections Floppy configuration sub-menuSuper I/O configuration sub-menu Bios Setup, Super I/O Configuration Sub-menuUSB configuration sub-menu Bios Setup, USB Configuration Sub-menu SelectionsFDD PCI configuration sub-menuBios Setup, PCI Configuration Sub-menu Selections CdromBios Setup, Memory Configuration Sub-menu Selections Boot menuMemory configuration sub-menu Bios Setup, Boot Menu SelectionsBios Setup, Boot Settings Configuration Sub-menu Selections Boot settings configuration sub-menu selectionsBoot device priority sub-menu selections Bios Setup, Boot Device Priority Sub-menu SelectionsBios Setup, Atapi Cdrom Drives Sub-menu Selections North Bridge Chipset ConfigurationBios Setup, Removable Drives Sub-menu Selections Chipset MenuFeature Options Help Text South Bridge Chipset ConfigurationEnabled, 8MB Dram ClocksSecurity menu PXH Bridge ConfigurationBios Setup, Security Menu Options Minute Bios Setup, Server Menu SelectionsServer menu Stays Off Bios Setup, System Management Sub-menu SelectionsSystem management sub-menu selections Stay OnBios Setup Serial Console Features Sub-menu Selections Serial Console features sub-menu selectionsEvent Log configuration sub-menu selections Bios Setup, Event Log Configuration Sub-menu SelectionsRecording the Current Bios Settings Upgrading the BiosPreparing for the Upgrade Bios Setup, Exit Menu SelectionsObtaining the Upgrade Utility Creating a Bootable Diskette Flash Update UtilityFlash Architecture and Flash Update Utility Rolling Bios and On-line updatesMulti-Disk Recovery Recovery ModeBios Recovery \split AMIBOOT.ROM AmibootManually Recovering the Bios Summary of Beep codesPost Error Beep Codes Error Handling and ReportingPost Error Beep Codes Beeps Error Message Post Progress Code DescriptionError Code Error Message Response Bios Event LogPost Error Messages and Handling PmmmemallocerrPost Code Checkpoints Post Progress Codes and MessagesPost Code Checkpoints LanguagemoduleerrEnable IRQ-0 in PIC for system timer interrupt Initializes remaining option ROMs Boot Block Initialization Code Checkpoints Bootblock Initialization Code CheckpointsBoot Block Recovery Code Checkpoints Bootblock Recovery Code CheckpointsDIM Code Checkpoints DIM Code CheckpointsAcpi Runtime Checkpoints Acpi Runtime CheckpointsBoot Block Post Progress Codes Diagnostic LEDsDiagnostic LED Post Progress Codes Post Progress Code LED ExamplePost Progress Codes SE7221BK1-ETechnical Product Specification SE7221BK1-E Technical Product Specification Board Power Budget Power InformationIntel Server Board SE7221BK1-E Power Budget Power Supply Rail Voltages Units WattsBoard Power Supply Voltage Specification Power Supply SpecificationsPower Timing Requirements 5VSB output voltage rise time shall be from 1.0ms to 25.0msOutput Voltage Timing Turn On/Off Timing +5VSB Dynamic LoadingTransient Load Requirements Absolute Maximum Ratings AC Line Transient SpecificationAC Line Fast Transient EFT Specification AC Line Sag Transient PerformanceMonitored Components Hardware MonitoringMean Time Between Failures Mtbf Test Results Monitored ComponentsHTHEMPDA/C TemperatureFANIN7 PIN #9 Fan Speed Control Block Diagram Fan Speed ControlChassis Intrusion Product Safety ComplianceProduct Regulatory Compliance Product EMC ComplianceElectromagnetic Compatibility Notices FCC USAKorean RRL Compliance Europe CE Declaration of ConformityTaiwan Declaration of Conformity Replacing the Back-Up Battery Australia / New ZealandCalculated Mean Time Between Failures Mtbf Mechanical SpecificationsProduct Code Calculated Mtbf Operating Temperature Mtbf DataSE7221BK1-E Server Board Mechanical Drawing Sku 1 Pedestal mount I/O shield mechanical drawing Revision Sku 2 Pedestal mount I/O shield mechanical drawing Page Glossary SE7221BK1-E Technical Product Specification Term DefinitionMSB LPCMBE MtbfVID SE7221BK1-E Technical Product Specification GlossaryVGA ZCR
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