Intel SE7221BK1-E manual Functional Architecture, Processor Subsystem

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SE7221BK1-E Technical Product Specification

3.Functional Architecture

This chapter provides a high-level description of the functionality distributed between the architectural blocks of the Intel® Server Board SE7221BK1-E.

3.1Processor Subsystem

The Intel® Server Board SE7221BK1-E supports Intel® Pentium® 4 and Celeron® D processors in the 775-land package, which is a follow on to Pentium® 4 and Celeron® D processors in the 478-pin package, with enhancements to the Intel® NetBurst® micro- architecture. Intel® Pentium® 4 and Celeron® D processors built on 90nm process technology in the 775-land package utilize Flip-Chip Land Grid Array (FC-LGA4) package technology, and plug into a 775-land LGA socket, referred to as the LGA775 socket. Pentium® 4 and Celeron®

Dprocessors in the 775-land package, like their predecessors in the 478-pin package, are based on the same Intel® 32-bit micro-architecture and maintain the tradition of compatibility with IA-32 software. Specific models of the Pentium® 4 Processor in the LGA775 package support Intel® EM64T (Extended Memory 64 Technology) for 64bit native mode operation with 64bit operating systems. The Intel® Celeron® Processor currently does not support EM64T.

3.1.1Processor VRD

The Intel® Server Board SE7221BK1-E has a VRD (Voltage Regulator Down) to support one processor. It is compliant with the VRM 10.1 DC-DC Converter Design Guide Line and provides a maximum of 120A, which is capable of supporting the requirements for Intel® Pentium® 4 and Intel® Celeron® D processors.

The board hardware must monitor the processor VTTEN (Output enable for VTT) pin before turning on the VRD. If the VTTEN pin of the processors is not identical the Power ON Logic will not turn on the VRD.

3.1.2Reset Configuration Logic

The BIOS determines the processor stepping, cache size, etc through the CPUID instruction. The requirements are as follows:

ƒProcessors run at a fixed speed, but can be programmed by BIOS to operate at a lower or higher speed.

The processor information is read at every system power-on.

Note: The processor speed is the processor power on reset default value. No manual processor speed setting options exist either in the form of a BIOS setup option or jumpers.

3.1.3Processor Module Presence Detection

SE7221BK1-E does not support this function.

3.1.4Processor Support

The Intel® Server Board SE7221BK1-E supports one processor in the LGA775 package. The support circuitry on the server board consists of the following:

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Contents Intel Server Board SE7221BK1-E Date Revision Modifications Number SE7221BK1-ETechnical Product SpecificationRevision Disclaimers SE7221BK1-E Technical Product SpecificationTable of contents Configuration Jumpers ConnectorsBios Setup Utility Acpi ImplementationBoot Block Post Progress Codes Power Information SE7221BK1 -E Technical Product SpecificationAbsolute Maximum Ratings Hardware MonitoringGlossary Industry Canada ICES-003Viii List of TablesSE7221BK1-E Technical Product Specification Revision List of Figures Page Introduction Server Board Overview SE7221BK1-E Feature Setƒ LPC Low Pin Count bus segment with one embedded devices ƒ USBPCI-X 100 Slot CPUProcessor Subsystem Functional ArchitectureInterrupts and Apic Memory SubsystemMemory Dimm Support Processor Support MatrixMemory Configuration Memory Bank Label Definition Location Dimm Label Channel Population OrderIntel E7221 Chipset Throughput Level Configuration CharacteristicsGmch Memory Architecture Overview 1.1 DDR2 ConfigurationsGraphics Memory Controller Hub Gmch Supported DDR2 modulesPCI Bus P32-A I/O Subsystem 3 ICH6RPCI Express* X4 Subsystem Power ManagementPCI Bus Master IDE Interface USB InterfaceSerial Ports Super I/OO Subsystem Bios FlashPCI Subsystem System Health Support2.2 P32-B Arbitration 2 P32-B 66-MHz PCI-X Subsystem SE7221BK1LX sku only1.2 P32-A Arbitration 3 P64-C 66/100-MHz PCI-X Subsystem P64-C Configuration IDs3.2 P64-C Arbitration P32-B Arbitration ConnectionsVideo Controller NIC Connector and Status LEDsNetwork Interface Controller NIC PCI-ELegacy Interrupt Routing Interrupt RoutingApic Interrupt Routing Legacy Interrupt SourcesISA Interrupt Description PCI Error HandlingSerialized IRQ Support Gmch Intr CPU ICH6ICH6 Ioapic DMI Interface PCI Interface Super I/OPB IRQ8 Interface PA IRQ8 InterfaceAcpi Front Panel SwitchesAcpi Implementation Wake up Sources Acpi and Legacy Power Button On to Off Legacy Power Button On to Off AcpiSupported Wake Events USBMain Power Connector ConnectorsPower Connector Pin-out CN4H1 Auxiliary CPU Power Connector Pin-out CN4B1I2C Header Front Panel ConnectorHsbp Header Pin-out J1D1 LCD Header Pin-out J1C1NIC Connector VGA ConnectorVGA Connector Pin-out J8A1 NIC1-82541PI10/100/1000 Connector Pin-out J5A1NIC2-82541PI 10/100/1000 Connector Pin-out J6A1 IDE ConnectorATA 40-pin Connector Pin-out J3J1 IDEA1 Diag IDEA0 IDEA2 IDEDCS0# IDEDCS1# IDEHDACT# GNDUSB Connector Sata ConnectorSata Connector Pin-out J1G1, J1G2, J1J2, J2J1 USB Connectors Pin-out J5A1Serial Port Connector Floppy ConnectorLegacy 34-pin Floppy Connector Pin-out JP3J1 External DB9 Serial a Port Pin-out J8A1Keyboard and Mouse PS/2 Connectors Pin-out KM9A1 Keyboard and Mouse ConnectorMiscellaneous Headers Fan HeaderIntrusion Cable Connector J1A1Pin-Out Pin Signal Name Intrusion Cable ConnectorHDD LED Header J1E1 Pin-Out Pin Signal Name HDD LED HeaderSystem Recovery and Update Jumpers Configuration JumpersRolling Bios selection header System Recovery and Update Jumper OptionsConfiguration Reset Bios Setup UtilityKeyboard Commands LocalizationCancel Load Setup Defaults?ESC PostBios Setup, Main Menu Options Entering Bios SetupSave configuration changes and exit setup? Feature Options Help Text DescriptionBios Setup, Advanced Menu Options Processor configuration sub-menuBios Setup, Processor configuration sub-menu options Advanced menuBios Setup IDE Configuration Menu Options IDE configuration sub-menuEnabled CompatibleHost & Device Bios Setup, IDE Device Configuration Sub-menu SelectionsAuto Cdrom ArmdSuper I/O configuration sub-menu Floppy configuration sub-menuBios Setup, Floppy Configuration Sub-menu Selections Bios Setup, Super I/O Configuration Sub-menuBios Setup, USB Configuration Sub-menu Selections USB configuration sub-menuBios Setup, PCI Configuration Sub-menu Selections PCI configuration sub-menuFDD CdromMemory configuration sub-menu Boot menuBios Setup, Memory Configuration Sub-menu Selections Bios Setup, Boot Menu SelectionsBoot device priority sub-menu selections Boot settings configuration sub-menu selectionsBios Setup, Boot Settings Configuration Sub-menu Selections Bios Setup, Boot Device Priority Sub-menu SelectionsBios Setup, Removable Drives Sub-menu Selections North Bridge Chipset ConfigurationBios Setup, Atapi Cdrom Drives Sub-menu Selections Chipset MenuEnabled, 8MB South Bridge Chipset ConfigurationFeature Options Help Text Dram ClocksSecurity menu PXH Bridge ConfigurationBios Setup, Security Menu Options Minute Bios Setup, Server Menu SelectionsServer menu System management sub-menu selections Bios Setup, System Management Sub-menu SelectionsStays Off Stay OnEvent Log configuration sub-menu selections Serial Console features sub-menu selectionsBios Setup Serial Console Features Sub-menu Selections Bios Setup, Event Log Configuration Sub-menu SelectionsPreparing for the Upgrade Upgrading the BiosRecording the Current Bios Settings Bios Setup, Exit Menu SelectionsFlash Update Utility Obtaining the Upgrade Utility Creating a Bootable DisketteRolling Bios and On-line updates Flash Architecture and Flash Update UtilityBios Recovery Recovery ModeMulti-Disk Recovery \split AMIBOOT.ROM AmibootSummary of Beep codes Manually Recovering the BiosPost Error Beep Codes Error Handling and ReportingPost Error Beep Codes Beeps Error Message Post Progress Code DescriptionPost Error Messages and Handling Bios Event LogError Code Error Message Response PmmmemallocerrPost Code Checkpoints Post Progress Codes and MessagesPost Code Checkpoints LanguagemoduleerrEnable IRQ-0 in PIC for system timer interrupt Initializes remaining option ROMs Bootblock Initialization Code Checkpoints Boot Block Initialization Code CheckpointsBootblock Recovery Code Checkpoints Boot Block Recovery Code CheckpointsAcpi Runtime Checkpoints DIM Code CheckpointsDIM Code Checkpoints Acpi Runtime CheckpointsDiagnostic LED Post Progress Codes Diagnostic LEDsBoot Block Post Progress Codes Post Progress Code LED ExamplePost Progress Codes SE7221BK1-ETechnical Product Specification SE7221BK1-E Technical Product Specification Intel Server Board SE7221BK1-E Power Budget Power InformationBoard Power Budget Power Supply Rail Voltages Units WattsPower Timing Requirements Power Supply SpecificationsBoard Power Supply Voltage Specification 5VSB output voltage rise time shall be from 1.0ms to 25.0msOutput Voltage Timing Turn On/Off Timing +5VSB Dynamic LoadingTransient Load Requirements AC Line Fast Transient EFT Specification AC Line Transient SpecificationAbsolute Maximum Ratings AC Line Sag Transient PerformanceMean Time Between Failures Mtbf Test Results Hardware MonitoringMonitored Components Monitored ComponentsHTHEMPDA/C TemperatureFANIN7 PIN #9 Fan Speed Control Fan Speed Control Block DiagramProduct Regulatory Compliance Product Safety ComplianceChassis Intrusion Product EMC ComplianceFCC USA Electromagnetic Compatibility NoticesKorean RRL Compliance Europe CE Declaration of ConformityTaiwan Declaration of Conformity Australia / New Zealand Replacing the Back-Up BatteryProduct Code Calculated Mtbf Operating Temperature Mechanical SpecificationsCalculated Mean Time Between Failures Mtbf Mtbf DataSE7221BK1-E Server Board Mechanical Drawing Sku 1 Pedestal mount I/O shield mechanical drawing Revision Sku 2 Pedestal mount I/O shield mechanical drawing Page Term Definition Glossary SE7221BK1-E Technical Product SpecificationMBE LPCMSB MtbfVGA SE7221BK1-E Technical Product Specification GlossaryVID ZCR