Intel SE7221BK1-E PCI Express* X4 Subsystem, PCI Bus Master IDE Interface, USB Interface, Apic

SE7221BK1-ETechnical Product Specification

ƒOne slots capable of supporting full length legacy PCI add-in cards operating at 33 MHz

4.1.3.2PCI Express* X4 Subsystem

The ICH6R supports one x4-lane PCI Express* interface that can also be configured as a single x1 or x4-lane port. The PCI Express* interface allows direct connection with the PXH/PXHD or PCI-E devices. (Fully compliant to the PCI Express* Base Specification, Rev 1.0a)

4.1.3.3PCI Bus Master IDE Interface

The ICH6R acts as a PCI-based Ultra ATA 100/66/33 IDE controller that supports programmed I/O transfers and bus master IDE transfers. The ICH6R supports one IDE channel, supporting two drives each (drives 0 and 1). The baseboard provides a 40-pin (2x20) IDE connector to access the IDE functionality.

The IDE interface supports Ultra ATA 100/66/33 Synchronous DMA Mode transfers on the 40- pin connector.

4.1.3.4USB Interface

The ICH6R contains one EHCI USB 2.0 controller and four USB ports. The USB controller moves data between main memory and up to four USB connectors. All ports function identically and with the same bandwidth. The Intel® Server Board SE7221BK1-E implements four ports on the board.

The baseboard provides two external USB ports on the back of the server board. The dual-stack USB connector is located within the standard ATX I/O panel area. The Universal Serial Bus Specification, Revision 1.1, defines the external connectors.

The third/fourth USB port is optional and can be accessed by cabling from an internal 9-pin connector located on the baseboard to an external USB port located either in front or the rear of a given chassis.

4.1.3.5SATA interface

The ICH6R contains four SATA ports. The data transfer rates up to 150Mbyte/s.

4.1.3.6Compatibility Interrupt Controller

The ICH6R provides the functionality of two cascaded 82C59 with 15 interrupts handling. Support processor system bus interrupt.

4.1.3.7APIC

The ICH6R integrates an I/O APIC capability with 24 interrupts.

4.1.3.8Power Management

One of the embedded functions of the ICH6R is a power management controller. This is used to implement ACPI-compliant power management features. The baseboard does support sleep states S0, S1, S4, and S5.

12 Revision 1.3