Intel SE7221BK1-E manual Post Progress Codes

Page 77

SE7221BK1-E Technical Product Specification

 

 

Diagnostic LED

Description

 

 

 

Decoder

 

 

 

G=Green, R=Red,

 

 

 

 

A=Amber

 

 

 

Hi

 

 

 

Low

 

15h

Off

 

G

Off

A

Pass control to the uncompressed code in shadow RAM. The initialization code

 

is copied to segment 0 and control will be transferred to segment 0.

 

 

 

 

 

 

 

 

 

 

 

 

Control is in segment 0. Verify the system BIOS checksum.

16h

Off

 

G

G

R

If the system BIOS checksum is bad, go to checkpoint code E0h.

 

 

 

 

 

 

Otherwise, going to checkpoint code D7h.

 

 

 

 

 

 

 

17h

Off

 

G

G

A

Pass control to the interface module.

 

 

 

 

 

 

 

18h

G

 

Off

Off

R

Decompress of the main system BIOS failed.

 

 

 

 

 

 

 

19h

G

 

Off

Off

A

Build the BIOS stack. Disable USB controller. Disable cache.

 

 

 

 

 

 

 

1Ah

G

 

Off

G

R

Uncompress the POST code module. Pass control to the POST code module.

 

 

 

 

 

 

 

1Bh

A

 

R

Off

R

Decompress the main system BIOS runtime code.

 

 

 

 

 

 

 

1Ch

A

 

R

Off

A

Pass control to the main system BIOS in shadow RAM.

 

 

 

 

 

 

 

E0h

R

 

R

R

Off

Start of recovery BIOS. Initialize interrupt vectors, system timer, DMA controller,

 

and interrupt controller.

 

 

 

 

 

 

 

 

 

 

 

 

 

E8h

A

 

R

R

Off

Initialize extra module if present.

 

 

 

 

 

 

 

E9h

A

 

R

R

G

Initialize floppy controller.

 

 

 

 

 

 

 

Eah

A

 

R

A

Off

Try to boot floppy diskette.

 

 

 

 

 

 

 

Ebh

A

 

R

A

G

If floppy boot fails, intialize ATAPI hardware.

 

 

 

 

 

 

 

Ech

A

 

A

R

Off

Try booting from ATAPI CD-ROM drive.

 

 

 

 

 

 

 

Eeh

A

 

A

A

Off

Jump to boot sector.

 

 

 

 

 

 

 

Efh

A

 

A

A

G

Disable ATAPI hardware.

 

 

 

 

 

 

 

 

 

 

 

 

 

Table 77. POST Progress Codes

 

 

 

 

 

 

 

 

 

 

 

Diagnostic LED

 

Description

 

 

 

Decoder

 

 

 

 

 

 

G=Green, R=Red,

 

 

 

 

 

A=Amber

 

 

 

 

 

 

Hi

 

 

Low

 

 

 

 

 

 

 

 

 

 

 

20h

Off

Off

R

Off

Uncompress various BIOS Modules

 

 

 

 

 

 

 

 

 

 

22h

Off

Off

A

Off

Verify password Checksum

 

 

 

 

 

 

 

 

 

 

24h

Off

G

R

Off

Verify CMOS Checksum.

 

 

 

 

 

 

 

 

 

 

26h

Off

G

A

Off

Read Microcode updates from BIOS ROM.

 

 

 

 

 

 

 

 

 

 

28h

G

Off

R

Off

Initializing the processors. Set up processor registers. Select least featured

 

 

processor as the BSP.

 

 

 

 

 

 

 

 

 

2Ah

G

Off

A

Off

Go to Big Real Mode

 

 

 

 

 

 

 

 

 

 

2Ch

G

G

R

Off

Decompress INT13 module

 

 

 

 

 

 

 

 

 

 

2Eh

G

G

A

Off

Keyboard Controller Test: The keyboard controller input buffer is free. Next,

 

 

issuing the BAT command to the keyboard controller

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

30h

Off

Off

R

R

Keyboard/Mouse port swap, if needed

 

 

 

 

 

 

 

 

 

 

32h

Off

Off

A

R

Write Command Byte 8042: The initialization after the keyboard controller BAT

 

 

command test is done. The keyboard command byte will be written next.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

65

 

Image 77
Contents Intel Server Board SE7221BK1-E Date Revision Modifications Number SE7221BK1-ETechnical Product SpecificationRevision Disclaimers SE7221BK1-E Technical Product SpecificationTable of contents Configuration Jumpers ConnectorsBios Setup Utility Acpi ImplementationBoot Block Post Progress Codes Power Information SE7221BK1 -E Technical Product SpecificationAbsolute Maximum Ratings Hardware MonitoringGlossary Industry Canada ICES-003Viii List of TablesSE7221BK1-E Technical Product Specification Revision List of Figures Page Introduction Server Board Overview SE7221BK1-E Feature Setƒ LPC Low Pin Count bus segment with one embedded devices ƒ USBPCI-X 100 Slot CPUProcessor Subsystem Functional ArchitectureInterrupts and Apic Memory SubsystemMemory Dimm Support Processor Support MatrixMemory Configuration Memory Bank Label Definition Location Dimm Label Channel Population OrderIntel E7221 Chipset Throughput Level Configuration CharacteristicsGmch Memory Architecture Overview 1.1 DDR2 ConfigurationsGraphics Memory Controller Hub Gmch Supported DDR2 modulesPCI Bus P32-A I/O Subsystem 3 ICH6RPCI Express* X4 Subsystem Power ManagementPCI Bus Master IDE Interface USB InterfaceSerial Ports Super I/OO Subsystem Bios FlashPCI Subsystem System Health Support2.2 P32-B Arbitration 2 P32-B 66-MHz PCI-X Subsystem SE7221BK1LX sku only1.2 P32-A Arbitration 3 P64-C 66/100-MHz PCI-X Subsystem P64-C Configuration IDs3.2 P64-C Arbitration P32-B Arbitration ConnectionsVideo Controller NIC Connector and Status LEDsNetwork Interface Controller NIC PCI-ELegacy Interrupt Routing Interrupt RoutingApic Interrupt Routing Legacy Interrupt SourcesISA Interrupt Description PCI Error HandlingSerialized IRQ Support Gmch Intr CPU ICH6ICH6 Ioapic DMI Interface PCI Interface Super I/OPB IRQ8 Interface PA IRQ8 InterfaceAcpi Front Panel SwitchesAcpi Implementation Wake up Sources Acpi and Legacy Power Button On to Off Legacy Power Button On to Off AcpiSupported Wake Events USBMain Power Connector ConnectorsPower Connector Pin-out CN4H1 Auxiliary CPU Power Connector Pin-out CN4B1I2C Header Front Panel ConnectorHsbp Header Pin-out J1D1 LCD Header Pin-out J1C1NIC Connector VGA ConnectorVGA Connector Pin-out J8A1 NIC1-82541PI10/100/1000 Connector Pin-out J5A1NIC2-82541PI 10/100/1000 Connector Pin-out J6A1 IDE ConnectorATA 40-pin Connector Pin-out J3J1 IDEA1 Diag IDEA0 IDEA2 IDEDCS0# IDEDCS1# IDEHDACT# GNDUSB Connector Sata ConnectorSata Connector Pin-out J1G1, J1G2, J1J2, J2J1 USB Connectors Pin-out J5A1Serial Port Connector Floppy ConnectorLegacy 34-pin Floppy Connector Pin-out JP3J1 External DB9 Serial a Port Pin-out J8A1Keyboard and Mouse PS/2 Connectors Pin-out KM9A1 Keyboard and Mouse ConnectorMiscellaneous Headers Fan HeaderIntrusion Cable Connector J1A1Pin-Out Pin Signal Name Intrusion Cable ConnectorHDD LED Header J1E1 Pin-Out Pin Signal Name HDD LED HeaderSystem Recovery and Update Jumpers Configuration JumpersRolling Bios selection header System Recovery and Update Jumper OptionsConfiguration Reset Bios Setup UtilityKeyboard Commands LocalizationCancel Load Setup Defaults?ESC PostBios Setup, Main Menu Options Entering Bios SetupSave configuration changes and exit setup? Feature Options Help Text DescriptionBios Setup, Advanced Menu Options Processor configuration sub-menuBios Setup, Processor configuration sub-menu options Advanced menuBios Setup IDE Configuration Menu Options IDE configuration sub-menuEnabled CompatibleHost & Device Bios Setup, IDE Device Configuration Sub-menu SelectionsAuto Cdrom ArmdSuper I/O configuration sub-menu Floppy configuration sub-menuBios Setup, Floppy Configuration Sub-menu Selections Bios Setup, Super I/O Configuration Sub-menuBios Setup, USB Configuration Sub-menu Selections USB configuration sub-menuBios Setup, PCI Configuration Sub-menu Selections PCI configuration sub-menuFDD CdromMemory configuration sub-menu Boot menuBios Setup, Memory Configuration Sub-menu Selections Bios Setup, Boot Menu SelectionsBoot device priority sub-menu selections Boot settings configuration sub-menu selectionsBios Setup, Boot Settings Configuration Sub-menu Selections Bios Setup, Boot Device Priority Sub-menu SelectionsBios Setup, Removable Drives Sub-menu Selections North Bridge Chipset ConfigurationBios Setup, Atapi Cdrom Drives Sub-menu Selections Chipset MenuEnabled, 8MB South Bridge Chipset ConfigurationFeature Options Help Text Dram ClocksSecurity menu PXH Bridge ConfigurationBios Setup, Security Menu Options Minute Bios Setup, Server Menu SelectionsServer menu System management sub-menu selections Bios Setup, System Management Sub-menu SelectionsStays Off Stay OnEvent Log configuration sub-menu selections Serial Console features sub-menu selectionsBios Setup Serial Console Features Sub-menu Selections Bios Setup, Event Log Configuration Sub-menu SelectionsPreparing for the Upgrade Upgrading the BiosRecording the Current Bios Settings Bios Setup, Exit Menu SelectionsFlash Update Utility Obtaining the Upgrade Utility Creating a Bootable DisketteRolling Bios and On-line updates Flash Architecture and Flash Update UtilityBios Recovery Recovery ModeMulti-Disk Recovery \split AMIBOOT.ROM AmibootSummary of Beep codes Manually Recovering the BiosPost Error Beep Codes Error Handling and ReportingPost Error Beep Codes Beeps Error Message Post Progress Code DescriptionPost Error Messages and Handling Bios Event LogError Code Error Message Response PmmmemallocerrPost Code Checkpoints Post Progress Codes and MessagesPost Code Checkpoints LanguagemoduleerrEnable IRQ-0 in PIC for system timer interrupt Initializes remaining option ROMs Bootblock Initialization Code Checkpoints Boot Block Initialization Code CheckpointsBootblock Recovery Code Checkpoints Boot Block Recovery Code CheckpointsAcpi Runtime Checkpoints DIM Code CheckpointsDIM Code Checkpoints Acpi Runtime CheckpointsDiagnostic LED Post Progress Codes Diagnostic LEDsBoot Block Post Progress Codes Post Progress Code LED ExamplePost Progress Codes SE7221BK1-ETechnical Product Specification SE7221BK1-E Technical Product Specification Intel Server Board SE7221BK1-E Power Budget Power InformationBoard Power Budget Power Supply Rail Voltages Units WattsPower Timing Requirements Power Supply SpecificationsBoard Power Supply Voltage Specification 5VSB output voltage rise time shall be from 1.0ms to 25.0msOutput Voltage Timing Turn On/Off Timing +5VSB Dynamic LoadingTransient Load Requirements AC Line Fast Transient EFT Specification AC Line Transient SpecificationAbsolute Maximum Ratings AC Line Sag Transient PerformanceMean Time Between Failures Mtbf Test Results Hardware MonitoringMonitored Components Monitored ComponentsHTHEMPDA/C TemperatureFANIN7 PIN #9 Fan Speed Control Fan Speed Control Block DiagramProduct Regulatory Compliance Product Safety ComplianceChassis Intrusion Product EMC ComplianceFCC USA Electromagnetic Compatibility NoticesKorean RRL Compliance Europe CE Declaration of ConformityTaiwan Declaration of Conformity Australia / New Zealand Replacing the Back-Up BatteryProduct Code Calculated Mtbf Operating Temperature Mechanical SpecificationsCalculated Mean Time Between Failures Mtbf Mtbf DataSE7221BK1-E Server Board Mechanical Drawing Sku 1 Pedestal mount I/O shield mechanical drawing Revision Sku 2 Pedestal mount I/O shield mechanical drawing Page Term Definition Glossary SE7221BK1-E Technical Product SpecificationMBE LPCMSB MtbfVGA SE7221BK1-E Technical Product Specification GlossaryVID ZCR